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Operational Amplifiers 1 Introduction (The first IC op amp was introduced in mid-1960s.) Why op amp is so popular ? We can do almost anything with op amp, such as, summation, subtraction, amplification, differentiation, integration, …. Op amp has almost ideal characteristics. Op amp works almost same as it is expected. What’s inside of op amp ? Operational Amplifier You should be able to design nontrivial circuit by the end of this chapter ! Chap. 9, complex but useful for high level engineer. 2.1 The Ideal Op Amp 2.1.1 The Op-Amp Terminals No terminal of op-amp package is physically connected to ground. Microelectronic Circuits - Fifth Edition Sedra/Smith Copyright 2004 by Oxford University Press, Inc. 2 2.1.2 Function and Characteristics of the Ideal Op Amp • Op amp is a differential-input single ended-output amplifier. • Op amp is a directly-coupled or dc amplifier. - useful, but can cause some serious practical problems o A(2 1 ) A: open-loop gain, differential gain 2.1.3 Differential and Common-mode Signals differential input signal: Id 2 1 Common-mode input signal: Icm TABLE 2.1 Characteristic of the ideal Op Amp 1. Infinite input impedance 2. Zero output impedance 3. Zero common-mode gain or, equivalently, infinite common-mode rejection 4. Infinite open-loop gain A (How are we going to use it?) (Feedback, closed loop) 5. Infinite bandwidth Microelectronic Circuits - Fifth Edition Sedra/Smith 1 Icm Id /2 2 Icm Id /2 Copyright 2004 by Oxford University Press, Inc. (2.1) 1 ( 2 ) (2.2) 2 1 (2.3) (2.4) 3 2.2 The Inverting Configuration Negative feedback Figure 2.5 The inverting closed-loop configuration. (Output is 180o phase-shifted w.r.t the input.) Figure 2.12 The noninverting configuration. p.77 Sect.2.3 (Output is in phase with the input.) Let's find G I 2.2.1 The closed-Loop Gain Ideal op amp: open loop gain A = ∞ If there is a finite output , 2 1 0 1 1 2 0 o 2 A The terminal 1and 2 are virtually shorted. The terminal 1 is a virtual ground ! The virtual ground is not an actual ground. Do not short the inverting input to ground to simplify analysis ! Microelectronic Circuits - Fifth Edition Sedra/Smith Copyright 2004 by Oxford University Press, Inc. 4 Procedure to find output voltage υo. ① Closed Loop gain: G 0 R 2 I R1 • υo will be 180o phase-shifted with respect to the input wave. Inverting amplifier ! • We can make the closed-loop gain as accurate as we want by selecting passive components of appropriate accuracy. • The closed-loop gain is (ideally) independent to the op-amp gain. Microelectronic Circuits - Fifth Edition Sedra/Smith Copyright 2004 by Oxford University Press, Inc. 5 2.2.2 The Effect of Finite Open-Loop Gain (A≠∞) i1 I ( 0 / A) R1 I 0 / A R1 0 2 1 0 1 1 0 / A ① 1 0 / A G 0 A i1 R2 0 I 0 / A A R1 R2 0 R2 / R1 I 1 (1 R2 / R1 ) / A (2.5) EXAMPLE 2.1 p.72 (a ) R1 1 k , R2 100 k , A=10 3 ,104 ,105 , % error of G to ideal G= ? I 0.1 V (b) A changes from 100,000 to 50,000 (50% reduction), % change of G = ? A 3 103 10 4 10 104 5 10 105 Microelectronic Circuits - Fifth Edition Sedra/Smith G ( R2 / R1 ) 100 ( R2 / R1 ) G 90.83 99.00 99.00 -9.17% -1.00% -0.10% Copyright 2004 by Oxford University Press, Inc. υ11 V -9.08mV -0.99mV -0.10mV 6 The production spread in the value of open-loop gain A between opamp units of the same type (part number) is very wide. To minimize the effect of the finite open-loop gain A, R we have to make 1 2 A R1 R2 / R1 G 0 (2.5) I 1 (1 R2 / R1 ) / A Microelectronic Circuits - Fifth Edition Sedra/Smith Copyright 2004 by Oxford University Press, Inc. 7 2.2.3 Input and output Resistance of Inverting Amplifier (not op-amp) What would happen if R1 is too small ? R ① R2 G ( R R1 ) Ideal input resistance I I R R1 of inverting amplifier, i i1 I / R1 not op-amp. For high gain (- R2 / R1), we need small R1, otherwise, R2 would be impractically large. Therefore, input resistance R1 should be much larger than output resistance of previous stage. Unfortunately, the internal resistance of most sensors are large. Contradiction ! Solution: example 2.2 Microelectronic Circuits - Fifth Edition Sedra/Smith Copyright 2004 by Oxford University Press, Inc. 8 EXAMPLE 2.2 p73 (a) (a) Find 0 / I . 0 0 0 A I 0 I i1 I R R R (b) Design the inverting amplifier with gain of 100 and an input resistance 1 MΩ. i2 i I R x i2 R2 0 I R R2 0 x R2 R3 R2 R3 I R i4 i2 i3 I 2 I R R1 R3 R2 I R i3 0 x i4 R4 = R2 R I I 2 I R4 R1 R R1 R3 0 R 2 I R1 R4 R4 1 R R3 2 Microelectronic Circuits - Fifth Edition Sedra/Smith (b) input resistance 1 MΩ R1=1 MΩ maximum resistance in practical circuits: 1 MΩ R2, R4=1 MΩ gain of -100 R3=10.2 k Ω (If we adopt a typical inverting amplifier and R1=1 MΩ, R2=100 MΩ, impractically large !) Copyright 2004 by Oxford University Press, Inc. 9 Transresistance (transimpedance) amplifier and current amplifier • Photodiode (photodetector) generates electronhole pairs proportional to the incident light power. • Therefore, photodiode is a current source (I). • υo = - IR2 means current input, voltage output ! Transresistance amplifier ! • Input resistance is R2/A, very small. (Try this!) • Since the photodiode has capacitance inside, if a large resistor for high output voltage is used instead of op-amp, time constant would be large, which means it can not be used in high frequency circuit. • Transresistance amplifier is currently used as a part of receiver in high speed fiber-optic communication systems. Microelectronic Circuits - Fifth Edition Sedra/Smith Figure 2.9 A current amplifier based on the circuit of Fig. 2.8. The amplifier delivers its output current to R4. It has a current gain of (1 + R2/R3), a zero input resistance, and an infinite output resistance. The load (R4), however, must be floating (i.e., neither of its two terminals can be connected to ground). Copyright 2004 by Oxford University Press, Inc. 10 2.2.3 An Important Application-The Weighted Summer. i1 1 R1 , i1 2 R2 , , in i i1 i2 in n Rn (2.6) 0 iRf iRf Rf R1 Figure 2.10 A weighted summer. 1 Rf R2 Rf Rn n (2.7) Mom, virtual grounds are extremely handy ! Rc Ra Rc Ra Rc Rc 2 3 4 R R R 1 b 2 Rb R4 R3 1 2 (2.8) Figure 2.11 A weighted summer capable of implementing summing coefficients of both signs. Microelectronic Circuits - Fifth Edition Sedra/Smith Copyright 2004 by Oxford University Press, Inc. 11 2.3 The Non-inverting Configuration 2.3.1 The close-Loop Gain The inverting configuration. Figure 2.12 The noninverting configuration. Let’s derive the expression of the voltage gain. 0 R 1 2 I R1 (2.9) Another derivation υo is divided to R1 and R2. R1 R1 R2 1 0 Microelectronic Circuits - Fifth Edition the Role of Negative feedback 1. Let υI increase. 2. υId is increased. 3. υo is increased. 4. Fraction of υo will be fed back to (-) terminal. 5. This feedback will be counteract the increase in υId , driving back to zero. – degenerative feedback (2.10) Sedra/Smith Copyright 2004 by Oxford University Press, Inc. 12 2.3.2 Characteristics of the noninverting Configuration 0 R 1 2 > 0 I R1 - Input and output signals have same phase.-noninverting. - Input impedance is infinite. - output impedance is zero. 2.3.3 Effect of Finite Open-Loop Gain - Follow the procedure used for inverting amplifier. - denominators are identical ! How come? G (2.11) - non-inverting amplifier 0 R2 / R1 I 1 (1 R2 / R1 ) (2.5) A G identical negative feedback (think about 0 V input !) 0 1 ( R2 / R1 ) I 1 1 ( R2 / R1 ) - inverting amplifier A - numerators are different ! How come? different amount of feedback (closed loop gain) In order to minimize the effect of the finite open-loop gain, A Microelectronic Circuits - Fifth Edition Sedra/Smith 1+ R2 R1 Copyright 2004 by Oxford University Press, Inc. (2.12) 13 2.3.4 The Voltage Follower - Input impedance is infinite. - very desirable feature. 0 R 1 2 = 1 I R1 - Buffer Amplifier ! to connect a source with a high impedance to a low-impedance load Usually, gain = 1 (Sect. 1.5) R1 , R2 0 Why do we need this? - 100% feedback ! - Used as impedance transformer or power amplifier. - Elegant in simplicity ! The unity-gain buffer or voltage follower. Microelectronic Circuits - Fifth Edition equivalent circuit model. Sedra/Smith Copyright 2004 by Oxford University Press, Inc. 14 2.4 Difference (differential) Amplifiers (very important application) 0 Ad Id Acm Icm differential gain differential input Common mode input (2.13) Common mode gain≈0 • The efficacy of a differential amp is measured by the degree of its rejection of common-mode signals in preference to differential input signals. Common-Mode Rejection Ratio (CMRR) = 20 log Ad Acm (2.14) Transducer (sensor) 0.001sin s t Noise (Electromagnetic Interference, EMI) from motor, spark, lightning… We want to amplify the sensor output only. (we want to reject common-mode noise signal.) 1sin N t 2.4.1 A single Op-Amp Difference Amplifier Gain of the inverting amplifier = -R2/R1 Gain of the non-inverting amplifier = 1+R2/R1 Microelectronic Circuits - Fifth Edition Sedra/Smith Combine these two amp. Independently adjustable or matched gain Copyright 2004 by Oxford University Press, Inc. 15 When I2 is zero, O1 R2 R1 I 1 When I 1 is zero, O 2 I 2 Figure 2.16 A difference amplifier. R4 R2 1 R3 R4 R1 To make gain R2/R1, R4 R2 R2 1 R3 R4 R1 R1 O 2 Superposition ! O R4 R2 R3 R1 R2 R1 I 2 R2 R I 2 I 1 2 Id R1 R1 (2.16) Ad R2 R1 (2.17) For easier matching, R3=R1, R4=R2 Microelectronic Circuits - Fifth Edition Sedra/Smith Copyright 2004 by Oxford University Press, Inc. 16 Differential input Resistance Rid R3 R1 and R4 R2 Rid Id iI Id R1iI 0 R1iI Rid 2R1 (2.20) Drawback 1: for large gain, very small R1 is required. Drawback 2: to vary the gain, two resistances should be changed. 2.4.2 A Superior Circuit-The Instrumentation Amplifier The Goal: High differential gain with high input resistance and easy gain control HOW? Voltage follower with gain + Difference amplifier R4 R2 R4 R2 1 ( I 2 I 1 ) 1 R3 R1 R3 R1 Id R R Ad 4 1 2 (2.21) R3 R1 O Disadvantages 1: in the first stage, common-mode gain = differential gain may causes saturation of op-amp. 2: in the first stage, two amplifiers have to be perfectly matched. 3: to vary the gain, two resistances (two R1) should be changed. There is a simple solution ! Microelectronic Circuits - Fifth Edition Sedra/Smith Copyright 2004 by Oxford University Press, Inc. 17 Instrumentation Amplifier 1 2 6 4 5 8 7 3 9 1 Microelectronic Circuits - Fifth Edition Sedra/Smith Copyright 2004 by Oxford University Press, Inc. 18 EXAMPLE 2.3 Design The instrumentation amplifier circuit to provide a gain that can be varied over the range of 2 to 1000 utilizing a 100 kΩ variable resistance ( a potentiometer or “pot” for short). (Sol.) Ad R4 R2 1 R3 R1 (2.21) - It is usually preferable to obtain all the required gain in the first stage. (Low Noise) - The second stage (difference amp) is usually designed for a gain of 1. - We select all the second-stage resistors to be 10 kΩ, practically convenient value. 1 R Ad 1 2 R1 2 R2 2 to 1000 R1 f R1 1 1 Microelectronic Circuits - Fifth Edition Sedra/Smith 2 R2 1000 R1 f 2 R2 2 R1 f 100 k R1f =100.2 Ω, R1f =100 Ω, 1% R2 = 50.050 kΩ, R2 = 49.9 kΩ, 1% Copyright 2004 by Oxford University Press, Inc. 19 2.5 Effect of Finite Open-Loop Gain and Bandwidth on Circuit Performance A circuit designer has to be thoroughly familiar with the characteristics of practical op amps and the effects of such characteristics on the performance of op-amp circuits. 2.5.1 Frequency Dependence of the Open-Loop Gain - Internally compensated op amps are unit that have a network (usually a single capacitor) within the IC chip. - Capacitor’s function is to cause the op-amp gain to have the STC low-pass response. - This process of modifying the open-loop gain is termed to frequency compensation. - The purpose of frequency compensation is to ensure that the op-amp will be stable (as oppose to oscillation: Ch. 8). A( s ) Figure 2.22 Open-loop gain of a typical generalpurpose internally compensated op amp. b , A(j ) A0b j (2.26) A( j ) A(j ) = A 0b A0 1 s / b A0 1 j / b (2.24) (2.25) (2.27) When A 1, t A0b (2.28) - ft = ωt/2π is specified on the data sheet as unity-gain band width. t t ft b , A(s ) (2.30) A( j ) = (2.31) s f Microelectronic Circuits - Fifth Edition Sedra/Smith Copyright 2004 by Oxford University Press, Inc. 20 A(j ) t f = t f (2.31) - If ft is known, one can easily determine the magnitude of the op-amp gain at a given frequency when f >> fb. The production spread in the value of ft between opamp units of the same type (part number) is much smaller than that of A0 and fb. ft is preferred as a specification parameter. - An op amp having this -6 dB/octave (= - 20 dB/decade) gain roll off is said to have a single-pole model. A( s ) A0 1 s / b pole: s=-b (2.24) - Since this single pole dominates the amplifier frequency response, it is called a dominant pole. (for more on poles and zeros, refer to Appendix E.) 2.5.2 Frequency Dependence of the Closed-Loop Gain The effect of limited op-amp gain and bandwidth on the closed-loop transfer functions. We know Vo R2 / R1 Vi 1 (1 R2 / R1 ) / A and A( s ) Then, Microelectronic Circuits - Fifth Edition Sedra/Smith Vo ( s ) Vi ( s ) A0 1 s / b R2 / R1 R2 1 s 1 1 A0 R1 t /(1 R2 / R1 ) Copyright 2004 by Oxford University Press, Inc. (2.24) (2.33) 21 for A0 1 R2 , R1 Vo ( s ) Vi ( s ) R2 / R1 s 1 t /(1 R2 / R1 ) (2.34) corner frequency, 3dB We know, Similary, Low-Pass STC Network ! Vo 1 R2 / R1 Vi 1 (1 R2 / R1 ) / A Vo ( s ) Vi ( s ) 1 R2 / R1 s 1 t /(1 R2 / R1 ) t 1+R2 / R1 (2.35) (2.36) (2.37) EXAMPLE 2.4 ft = 1 MHz, find 3-dB frequency of closed-loop amp with gain of 1000, 100, 10, 1, -1, -10, -100, -1000 Gain-bandwidth product = 1000 V/V-kHz = 60dB-kHz Microelectronic Circuits - Fifth Edition Sedra/Smith R1 R1 R2 Non-inverting amplifier Copyright 2004 by Oxford University Press, Inc. 22 2.6 Large-signal Operation of Op Amps 2.6.1 Output Voltage Saturation Rated output voltage (output saturation voltage) = ± L (L=VDD – α V ) 2.6.2 Output Current Limits For example, maximum output current of 741 is ± 20 mA. EXAMPLE 2.5 Output saturation voltage = ± 13 V, output current limits = ± 20 mA (a) Output voltage for Vp =1 V, RL= 1 kΩ υo/ υI = (1+R2/R1): Vop = 10 V, Iop = 10 mA (b) Output voltage for Vp =1.5 V, RL= 1 kΩ Vop = 15 V, Iop = 14.3 mA (c) for RL= 1 kΩ, Vpmax = ? for undistorted output. 13/10 = 1.3 V ( 14.3 mA) (d) for Vp =1.5 V, RLmin = ? for undistorted output. iO max 20 mA 10 V 10 V RLmin 9 k + 1 k RLmin 526 Microelectronic Circuits - Fifth Edition Sedra/Smith Copyright 2004 by Oxford University Press, Inc. 23 2.6.3 Slew Rate - Another nonlinear distortion due to the large output signal Slew Rate : maximum rate of change possible at the output of a real op amp SR = dO dt (V/s) (2.38) max Why this happens ? : Chap. 9 SR is distinct from the finite op-amp bandwidth. - The limited bandwidth : linear, no distortion, but reduced gain at higher frequency. - The limited Slew-rate : nonlinear distortion, even at low frequency when output is too large. When V is sufficiently small, the output can be the exponentially rising ramp. d ( A sin t ) = A cos t dt Vo ( s ) Vi ( s ) 1 R2 / R1 s 1 t /(1 R2 / R1 ) When R1 , R2 0, (2.37) VO 1 Vi 1 s / t (2.39) This is a low-pass STC response. Output from capacitor of RC network ! O (t ) V (1 e t ) t Microelectronic Circuits - Fifth Edition Sedra/Smith (2.40) Copyright 2004 by Oxford University Press, Inc. 24 2.6.4 Full-Power Bandwidth I V i sin t , d I V i cos t dt MVomax SR SR fM 2Vo max If SR < V i , (2.41) full-power bandwidth Figure 2.27 Effect of slew-rate limiting on output sinusoidal waveforms. At which an output sinusoid with amplitude equal to the rated output voltage of the op amp begins to show distortion due to slew-rate limiting. Vo Vo max M (2.42) Maximum amplitude of the undistorted output sinusoid. 2.7 DC Imperfection 2.7.1 Offset Voltage Op amps are direct-coupled devices. They are prone to dc problems. • With inputs being zero, the amplifier output rests at some dc voltage level instead of zero. The equivalent dc input offset voltage is V V o 10 mV(0.25 mV w/high cost) OS A Microelectronic Circuits - Fifth Edition Sedra/Smith Copyright 2004 by Oxford University Press, Inc. 25 R1 =1.2 kΩ, R2 = 1 MΩ, To include effect of offset voltage, ic o A id CMRR V OS V 3 mV OS υO = ? 1 MΩ V 1 (0.003) 2.5V O 1.2kΩ If υid =0, o A ic V A( ) OS CMRR OS CMRR ic V When an input signal is applied to the amplifier, the corresponding signal output will be superimposed on the 2.5 V dc. Then the allowable signal swing at the output will be reduced. If signal is dc, we would not know where the output is due to VOS or the signal. V/V OS (another interpretation of CMMR) • * To overcome dc offset problem Thus, CMRR is a measure of how total offset voltage vOS changes from its dc value VOS when common-mode voltage is applied. * The gain will fall off at the low- frequency. Figure 2.28 Circuit model for an op amp with input offset voltage VOS. Microelectronic Circuits - Fifth Edition Sedra/Smith Copyright 2004 by Oxford University Press, Inc. 26 2.7.2 Input Bias and Offset Current * To find the dc output voltage of the closed-loop amp due to the input bias current In order for the op amp to operate, its two input terminals have to be supplied with current, termed the input bias current. Why? Bias currents ( base currents in BJTs or gate currents in MOSFETs or JFETs) are similar in value with directions depending on internal amplifier circuit type. VO I B1 R2 I B R2 (2.44) How to reduce the dc output voltage due to the input bias current IB I B1 I B 2 : input bias current in data sheet 2 IOS I B1 I B2 : input offset current VO I B 2 R3 R2 ( I B1 I B 2 R3 / R1 ) (2.45) if I B1 I B2 I B , VO I B R2 R3 (1 R2 / R1 ) For minimum VO , R3 R2 RR 1 2 (2.46) 1 R2 / R1 R1 R2 Microelectronic Circuits - Fifth Edition Sedra/Smith With this R 3 and I B1 I B 2 , VO IOS R2 < I B R2 Copyright 2004 by Oxford University Press, Inc. (2.47) 27 Conclusion: To minimize the effect of the input bias current, Place in the positive lead a resistance equal to the dc resistance seen by the inverting terminal. • There should be a continuous dc path between each input terminal and ground. This circuit will not work. Microelectronic Circuits - Fifth Edition Sedra/Smith This circuit will work. Copyright 2004 by Oxford University Press, Inc. 28 2.8 Integrators and Differentiators 2.8.1 The Inverting Configuration with General Impedances Vo ( s ) Z ( s) 2 Vi ( s ) Z1 ( s ) (2.48) Example 2.6, p106 Sol) Vo ( s ) 1 Vi ( s ) Z1 ( s )Y2 ( s) Vo ( s ) R2 / R1 Vi ( s ) 1 sC2 R2 Vo ( s ) ? * Is this STC circuit? Vi ( s ) * dc gain=?, 3 dB frequency=? * Design a circuit of dc gain=40 dB, 3 dB frequency=1 kHz, input resistance = 1 kΩ * Frequency of gain=1 and phase at this frequency Microelectronic Circuits - Fifth Edition Sedra/Smith Vo ( s ) 1 R1 Vi ( s ) sC 2 R1 R1 K R2 R1 0 1 C2 R2 R2 100, R1 1 k, R2 100 k R1 1 0 2 1 103 C2 1.59 nF C2 100 103 -20dB roll off f t 100 f0 100 kHz 40 dB = 100 V/V from Bode plots phase shift = -270o or +90o Copyright 2004 by Oxford University Press, Inc. 29 2.8.2 The inverting Integrator Figure 2.39 (a) The Miller or inverting integrator. (b) Frequency response of the integrator. C ( t ) VC 1 C t i ( t ) dt 0 1 1 O ( t ) C ( t ) RC t 0 I ( t ) dt VC (2.49) CR : integrator time-constant. Vo ( s ) Z ( s) 2 Vi ( s ) Z1 ( s ) (2.48) Vo ( s ) 1 Vi ( s ) sCR Vo ( j ) 1 Vi ( j ) jCR Microelectronic Circuits - Fifth Edition Sedra/Smith Vo 1 Vi CR int 90 , 1 : integrator frequency CR * An integrator behaves as a low-pass filter with a corner frequency of zero. * At f=0, the magnitude of the integrator transfer function is infinite and the op amp is operating with an open loop. * Any tiny dc component input signal will theoretically produce an infinite output ! Serious problem !!! * In practice, the output saturates at power supply voltage. Copyright 2004 by Oxford University Press, Inc. 30 * Deleterious effect from the presence of the op-amp input dc offset voltage * Deleterious effect from the presence of the op-amp input dc offset current ( R is added in (+) to reduce the effect of bias current.) Place in the positive lead a resistance equal to the dc resistance seen by the inverting terminal. Assuming C =0 at t 0, O VOS VOS t CR (2.55) (lineary increasing) Op amp will saturate very soon !!! Assuming C =0 at t 0, The dc offset current produces a similar problem !! O I B 2 R Solution I OS t C (lineary increasing) Let’s provide a dc current (VOS and IOS) path ! dc component of O VOS (1 RF / R) IOS RF Low RF is better for dc of O . Vo ( s) R /R F Vi ( s ) 1 sCRF Vo ( s ) 1 High RF is better for ideal integrator. sCR Vi ( s ) Selecting a value for RF present the designer with a trade-off between dc performance and signal performance. (example 2.7, p110) Microelectronic Circuits - Fifth Edition Sedra/Smith Copyright 2004 by Oxford University Press, Inc. 31 EXAMPLE 2.7 Find the output by the Miller integrator due to I ( R1 10 k, C 10 nF). I ( RF 1 M). Find the output by the Miller integrator due to Sol) 1 t 1. dt , 0 t 1 ms CR 0 ( R1 10 k, C 10 nF) O (t ) 10t , O (t ) 0 t 1 ms Constant current (1 V/10 kΩ= 0.1 mA) to capacitor. ( RF 1 M, C 10 nF) Using Eq.(1.29) p.46, O (t ) O () O () O (0)e t / CRF O () IRF 0.1 103 1 106 100 V O (0 ) 0, initial value O (t ) 100(1 e t /10 ), 0 t 1 ms O (1 ms) 100(1 e t /10 ) 9.5 V Important Applications: square-wave input to triangular output Exercise 2.27, (Function Generator !!), : Active Filter !! (Ch. 12) Microelectronic Circuits - Fifth Edition Sedra/Smith Copyright 2004 by Oxford University Press, Inc. 32 2.8.3 The Op-Amp Differentiator C (t ) I (t ) d I ( t ) Vo 1 at 1/ CR Vi i(t ) C dt d ( t ) O ( t ) CR I dt CR: differentiator time-constant (2.56) * Differentiator is an STC highpass filter with a corner frequency at infinity. * Differentiator is a noise magnifier. Z1 ( s ) 1/ sC Z2 ( s) R Input Vo ( s ) sCR Vi ( s ) (2.57) Vo ( j ) j CR Vi ( j ) Vo CR (2.59) Vi (2.58) 90 Microelectronic Circuits - Fifth Edition Sedra/Smith (2.60) Output * Spikes in output could cause EMI problems. * A small resistor in series with the capacitor might solve this problem, but the circuit becomes non-ideal differentiator. * Due to the EMI and stability (Ch.8) problem, differentiator is seldom used in practice. Copyright 2004 by Oxford University Press, Inc. 33 2.9 The SPICE Op-Amp Model and Simulation Examples Figure 2.45 A linear macromodel used to model the finite gain and bandwidth of an internally compensated op amp. The differential gain : A0d of the voltage-controlled voltage source Ed Frequency response : Rb-Cb low-pass filter with corner frequency fb 1/ 2 RbCb Eb with gain of 1 is used to isolate the low-pass filter from any load at output. (2.61) Figure 2.46 A comprehensive linear macromodel of an internally compensated op amp. Microelectronic Circuits - Fifth Edition Sedra/Smith Copyright 2004 by Oxford University Press, Inc. 34 Microelectronic Circuits - Fifth Edition Sedra/Smith Copyright 2004 by Oxford University Press, Inc. 35 Microelectronic Circuits - Fifth Edition Sedra/Smith Copyright 2004 by Oxford University Press, Inc. 36 Microelectronic Circuits - Fifth Edition Sedra/Smith Copyright 2004 by Oxford University Press, Inc. 37 Microelectronic Circuits - Fifth Edition Sedra/Smith Copyright 2004 by Oxford University Press, Inc. 38 Dual In-line Package Microelectronic Circuits - Fifth Edition Sedra/Smith Copyright 2004 by Oxford University Press, Inc. Small Out-line Package 39