Unit 6. Analog-to-Digital Conversion

Report
EET 252 Unit 6
Analog-to-Digital Conversion
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Read Floyd, Section 12-1 and 12-2.
Study Unit 6 e-Lesson.
Do Lab #6.
Homework #6 and Lab #6 due next
week.
Quiz next week.
Analog Quantities
•Most physical quantities (temperature,
pressure, light intensity, etc.) are analog
quantities.
•Transducers are devices that convert one of
these physical quantities to an analog voltage
or current.
•Example, a temperature sensor might
produce a voltage in mV that is proportional
to the temperature in degrees Fahrenheit.
Interfacing to the Analog World
•To use a computer to process analog
information, we must first use an analog-todigital converter (ADC) to transform the
analog values into digital binary values.
•Conversely, we use a digital-to-analog
converter (DAC) to transform digital values
from the computer into analog values that can
be used to control analog devices.
A Typical Application
Digital
outputs
Digital
inputs
Analog input
(voltage or
current)
Physical
variable
Transducer
Analog output
(voltage or
current)
ADC
.
.
.
Computer
.
.
.
DAC
Actuator
Control
physical
variable
ADC: A Three-Step Process
•On the previous slide, the box labeled ADC
actually represents three steps:
1. Anti-aliasing Filter
2. Sample and Hold
3. Analog-to-Digital Conversion (Quantization)
•
The circuits that perform these steps may
be on separate chips or may be combined
onto a single ADC chip.
Sampling Rate
Most input signals to an electronic system start out as analog
signals. One step in converting the input to a digital signal is
sampling the input repeatedly.
If we want to get an
accurate representation
of the original signal, we
must sample at a high
enough rate that we
capture the signal’s
variations.
Floyd, Digital Fundamentals, 10th ed
Analog
input
signal
Sampling
circuit
Sampling
pulses
Sampled
version of
input signal
© 2009 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved
The Nyquist Sampling Theorem
The Nyquist Sampling Theorem states that:
In order to recover a signal, the sampling rate must be
greater than twice the highest frequency in the signal.
Stated as an equation, fsample > 2fa(max)
where fsample = sampling frequency
fa(max) = highest harmonic in the analog signal
If the signal is sampled less frequently than this, the recovery process
will produce frequencies that are entirely different than in the original
signal. These “masquerading” signals are called aliases.
Floyd, Digital Fundamentals, 10th ed
© 2009 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved
Aliasing on the Digital Oscilloscope
•To see an example of aliasing, use the
oscilloscope to display a 10 kHz sine wave.
•For this frequency, what is a reasonable value
for the SEC/DIV setting?
•Try setting the SEC/DIV to a much higher
value, and you’ll see an alias of the original
sine wave.
•Se discussion on page 20 of oscilloscope’s
manual.
Anti-Aliasing Filters
•The job of an anti-aliasing filter is to remove
frequencies from the input signal that are
higher than our sampling circuit can handle.
•This prevents the system from being fooled
into thinking that the input signal contains
frequencies that it doesn’t really contain.
Anti-aliasing Filter
An example of a reasonable sampling rate is in a
digital audio CD. For audio CDs, sampling is done
at 44.1 kHz because audio frequencies above
20 kHz are not detectable by the ear.
What cutoff frequency should an
anti-aliasing filter have for a
digital audio CD?
Less than 22.05 kHz.
Floyd, Digital Fundamentals, 10th ed
© 2009 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved
Sample and Hold
After the anti-aliasing filter, the next step in converting a
signal to digital form is the sample-and-hold circuit. This
circuit samples the input signal at a rate determined by a
clock signal and holds the level on a capacitor until the
next clock pulse.
A positive half-wave from 0-10 V
is shown in blue. The sample-andhold circuit produces the staircase
representation shown in red.
Floyd, Digital Fundamentals, 10th ed
10 V
0V
© 2009 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved
Figure 12.5 Illustration of a sample-and-hold operation.
Note: I’ve modified this figure by making the first sample much closer to 0 than is shown in the original figure.
Digital Fundamentals, Tenth Edition
Thomas L. Floyd
Copyright ©2009 by Pearson Higher Education, Inc.
Upper Saddle River, New Jersey 07458
All rights reserved.
Analog-to-Digital Conversion (Quantization)
The final step is to quantize these staircase levels to binary coded
form using an analog-to-digital converter (ADC). The digital values
can then be processed by a computer.
Floyd, Digital Fundamentals, 10th ed
© 2009 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved
Number of Bits and Accuracy
•During the quantization process, the ADC
converts each sampled value of the analog
signal into a binary code.
•The more bits that are used in this code, the
more accurate is the representation of the
original signal.
•The following slides show an example of how
using 2 bits (Figures 12.7 and 12.8) results in
much less accuracy than using 4 bits (Figures
12.9 and 12.10).
Figure 12.7 Light gray = original waveform. Blue = Sample-and-hold output waveform. Pink = Four quantization
levels if we use 2 bits to quantize. Next figure shows the result of this 2-bit quantization.
Digital Fundamentals, Tenth Edition
Thomas L. Floyd
Copyright ©2009 by Pearson Higher Education, Inc.
Upper Saddle River, New Jersey 07458
All rights reserved.
Figure 12.8 Light gray = original waveform. Blue = Reconstructed waveform using four quantization levels (2 bits).
Digital Fundamentals, Tenth Edition
Thomas L. Floyd
Copyright ©2009 by Pearson Higher Education, Inc.
Upper Saddle River, New Jersey 07458
All rights reserved.
Figure 12.9 Light gray = original waveform. Blue = Sample-and-hold output waveform. Pink = Sixteen quantization
levels if we use 4 bits to quantize. Next figure shows the result of this 4-bit quantization.
Digital Fundamentals, Tenth Edition
Thomas L. Floyd
Copyright ©2009 by Pearson Higher Education, Inc.
Upper Saddle River, New Jersey 07458
All rights reserved.
Figure 12.10 Light gray = original waveform. Blue = Reconstructed waveform using sixteen quantization levels (4 bits).
Digital Fundamentals, Tenth Edition
Thomas L. Floyd
Copyright ©2009 by Pearson Higher Education, Inc.
Upper Saddle River, New Jersey 07458
All rights reserved.
Resolution
•Several common ways of specifying an ADC’s
resolution:
•Number of bits, n
n
•Number of output codes, = 2 , or number of
n
steps in the output, = 2 − 1
n
•Percentage resolution, = 1 / (2 − 1),
expressed as a percentage
•Step size, = Vref / 2
n
Resolution: Examples
Number of bits
Number of output
codes
Number of steps in
the output
Percentage
resolution
Step size (assuming
5 V reference
voltage)
Formula
4-bit ADC
n
2n
4
16
2n−1
15
1 / (2n−1)
6.67%
n
Vref / 2
312.5 mV
10-bit ADC
How to Build an ADC
•There are several standard designs:
1. Digital-Ramp ADC
2. Successive Approximation ADC*
3. Flash ADC*
4.
Dual-Slope ADC*
5.
Sigma-Delta ADC*
6.
Up/Down Digital-Ramp ADC
7.
Voltage-to-Frequency ADC
*Discussed in the textbook
Operational Amplifiers
•Many ADCs and DACs contain one or more
operational amplifiers (op amps).
•Op amps are extremely versatile devices that
you’ll study in EET 207.
•We just need to know a little bit about op
amps….
Op Amp with No Feedback
•Op amps are often used as comparators, in
which case there is no feedback between the
op amp’s output and either input:
•Vout is HIGH when Vin2 > Vin1.
•Vout is LOW when Vin2 < Vin1.
Flash ADC
+VREF
Op-amp
comparators
R
Input from
sampleand-hold
The flash ADC:
The flash ADC uses a series of highspeed comparators that compare the
input with reference voltages. Flash
ADCs are fast but require 2n – 1
comparators to convert an analog
input to an n-bit binary number.
+
–
R
+
–
R
+
–
R
R
R
R
Priority
encoder
7
6
5
+
–
4
+
–
1
0
1
2
4
3
2
D0 Parallel
D1 binary
output
D2
EN
+
–
+
–
Enable
pulses
R
How many comparators are needed by a 10-bit flash ADC?
1023
Floyd, Digital Fundamentals, 10th ed
© 2009 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved
Successive Approximation ADC
The successive approximation ADC:
1. Starting with the MSB, each bit in the successive approximation
register (SAR) is activated and tested by the digital-to-analog converter
(DAC).
Vout
DAC
2. After each test, the DAC
produces an output voltage that
D0
represents the bit.
D1
3. The comparator compares
this voltage with the input Input
signal. If the input is larger, signal
the bit is retained; otherwise
it is reset (0).
Comparator
D2
–
+
Parallel
binary
output
D3
(MSB)
D
CLK
(LSB)
SAR
C
Serial
binary
output
The method is fast and has a fixed conversion time for all inputs.
Floyd, Digital Fundamentals, 10th ed
© 2009 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved
ADC0804 Chip
An integrated circuit successive approximation ADC is the
ADC804. This popular ADC is an 8-bit converter that
completes a conversion in 64 clock periods (100 ms).
VCC
(20)
(1)
(2)
(3)
(4)
(6)
(7)
(9)
ADC0804
∆
∆
∆
∆
∆
∆
∆
∆
CS
RD
WR
CLK IN
Vin+
Analog
input
Vin–
REF/2
(8)
(5)
INTR
(19)
(18) CLK R (out)
D0
(17)
D1
(16)
D2
(15)
Digital
D3
(14)
data
D4
output
(13)
D5
(12)
D6
(11)
D7
The completion is signaled by the
INTR line going LOW.
(10)
ANLG DGTL
GND GND
Floyd, Digital Fundamentals, 10th ed
© 2009 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved
A Popular ADC Chip
•ADC0804 (Datasheet on course website)
•Note separate analog and digital grounds,
series RC network to control timing, and
“handshaking lines” that a microprocessor uses
to communicate with the ADC.

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