Chapter 1

Report
CMOS Analog Design Using
All-Region MOSFET Modeling
Chapter 1
Introduction to analog CMOS design
CMOS Analog Design Using All-Region MOSFET
Modeling
1
Important differences between BJTs
and MOSFETs
A) BJTs are three-terminal devices and MOSFETs
are four-terminal devices
B) Differences in the internal symmetries of the
most commonly used BJTs and MOSFETs
C) BJT exponential current law vs. MOS current
law
D) The geometric degrees of freedom for
MOSFETs in analog design
E) Quality of BJT and MOSFET models
CMOS Analog Design Using All-Region MOSFET
Modeling
2
Ebers-Moll equivalent circuit of an npn
transistor
Forward and reverse currents
IE
E
IC   F I F  I R
RIR
FIF
DE
DC
IF
IB
IC
C
IR
B
I E  R IR  I F
I B  ( IC  I E )  (1   F ) I F  (1  R ) I R
CMOS Analog Design Using All-Region MOSFET
Modeling
3
The capacitive model of the MOS
structure
depletion
VGB
region
s
p- type
neutral region
VGB
Cox
Cb
s
ds
Cox
1


dVGB Cox  Cb n
CMOS Analog Design Using All-Region MOSFET
Modeling
4
MOSFET: symmetric strong and weak
inversion models
VDB
VGB
VSB
ID
n+
n+
p-type substrate
strong inversion
I F ( R) 


V

2n
GB
weak inversion
ID  IF  IR
 nVSB ( DB )  VT 0 
2
I F ( R)
W VGB VT 0  nVSB ( DB )  / nt
 I0 e
L
W
 Cox
L
CMOS Analog Design Using All-Region MOSFET
Modeling
5
Intrinsic gain stages: common-source
and common-emitter amplifiers
CMOS Analog Design Using All-Region MOSFET
Modeling
6
Small-signal circuit and frequency
response of the CS and CE amplifiers
gm
vo  
vi ;
jCL
  b
gm
u 
CL
CMOS Analog Design Using All-Region MOSFET
Modeling
7
Design of the CE and CS amplifiers
Av u   1
gm  uCL  2  GB  CL
BJT
VBE /t
IC  I S e
IC  gmt  2  GB  CL  t
MOSFET
I Dsi
1 
W
2


 Cox  VGB  VT 0  nVSB 
2n 
L
I Dsi
CMOS Analog Design Using All-Region MOSFET
Modeling
ngm2

2Cox W / L 
8
Example: GB = 10 MHz, CL = 10 pF
Cox = 80·10-6 A/V2, n = 1.35
gm  2  GB  CL  628 A/V
W/L

500
100
50
10
IDsi (A)1
0
6.6
33.2
66.4
332
ID (A)2
22
28.6
55.2
88.4
354
1
Strong inversion model. 2 Accurate allregion MOSFET model
CMOS Analog Design Using All-Region MOSFET
Modeling
9
All-region “empirical” model of the
MOSFET
I D  22 μA  I Dsi
IWI  ngmt  1.35  628 106.26 103  22 μA
I D  IWI  I Dsi
I D  IWI


gm
 ng mt 1 

 t W / L  
 2 Cox
 W / L th 
1 

W / L  

gm  W / Lth   2Cox t 
CMOS Analog Design Using All-Region MOSFET
Modeling
10
Aspect ratio vs. current excess in a
MOSFET design
I D  IWI
 W / L th 
1 

W / L  

CMOS Analog Design Using All-Region MOSFET
Modeling
11
Consistent modeling of MOSFETs
and the series association
I D  W / L eq  g VG ,VS   g VG ,VD  
W / L S W / L D
W / L eq 
W / L S  W / L D
CMOS Analog Design Using All-Region MOSFET
Modeling
12
Series-parallel association of MOSFETs
CMOS Analog Design Using All-Region MOSFET
Modeling
13
Series association of MOSFETs vs.
long-channel MOSFETs
Series association
Long-channel
Nominal VT
L-dependent VT
Characterize one
L-dependent characterization
transistor ( performance of (halo/pocket implants effects)
the shortest transistor is
“optimized”)
“Accurate” for current
mirrors
L-dependent accuracy
Gate current more
predictable
Extrinsic capacitors at
intermediate nodes
CMOS Analog Design Using All-Region MOSFET
Modeling
14
Application of series parallel associations
of MOSFETs - M:1 current mirrors
M
Iin
: 1
M
IO
:
1
IO
Iin
M
M
N
:
1/ M
IO
N
M
Iin
N
M
M
CMOS Analog Design Using All-Region MOSFET
Modeling
15
Current mismatch of two M:1
current mirrors
Iin
100
: 1
IO
100
100
:
1
IO
Iin
10
N
100
10
Arnaud, JSSC Sep. 06
CMOS Analog Design Using All-Region MOSFET
Modeling
16
M-2M Digital-to-Analog converter (1):
A set of 4 transistors can be used as substitute for Mbb
ID1
ID2
Mc
Md
ID
Mbc
VG
Ma
Mba
ID1
ID2a
Mbd
Mbb
ID2b
CMOS Analog Design Using All-Region MOSFET
Modeling
17
M-2M Digital-to-Analog converter (2):
8 bit DAC with M-2M ladder
IB
VB
VR
IR
MB1
M71
MB2
M72
M73
M61
M64
M01
M04
M62
M63
M02
M03
M00
Q7
-Q7
Q6
-Q6
Q0
-Q0
-Q7
Q7
-Q6
Q6
-Q0
Q0
I0
V0
IG
VG
GB
Q7
Di
D
ck
Q
Q6
D
ck
Q
Q1
D
ck
Q
Q0
D
Q
Do
ck
Ck
CMOS Analog Design Using All-Region MOSFET
Modeling
18
M-2M Digital-to-Analog converter (3):
Model of the normalized current mismatch for a
10 μm x 10 μm transistor
CMOS Analog Design Using All-Region MOSFET
Modeling
19
M-2M Digital-to-Analog converter (4):
CMOS Analog Design Using All-Region MOSFET
Modeling
20
M-2M Digital-to-Analog converter (5):
Top area is the M-2M ladder and the bottom area is the
serial register.
Klimach, ISCAS 08
CMOS Analog Design Using All-Region MOSFET
Modeling
21
Similar approaches to CMOS design
Paul G. A. Jespers; The gm/ID Design Methodology for CMOS
Analog Low Power Integrated Circuits
2009, ISBN: 978-0-387-47100-6
D. M. Binkley; Tradeoffs and Optimization in Analog CMOS
Design ISBN: 978-0-470-03136-0, Wiley 2008.
Danica Stefanovic and Maher Kayal; Structured Analog CMOS
Design Series: Analog Circuits and Signal Processing
2009, ISBN: 978-1-4020-8572-7
CMOS Analog Design Using All-Region MOSFET
Modeling
22

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