Chapter 3 Top Level View of Computer Function and Interconnection

Chapter Three:
Interconnection Structure
• The interconnection structure must
support the following types of support:
– Memory to processor: the CPU reads an
instruction or data from memory
– Processor to memory: the CPU write data to
– I/O to Processor: The CPU reads data from
the I/O device via the I/O module
– Processor to I/O
Interconnection Structure
– I/O to or from memory: An I/O module is
allowed to change data directly with
memory without going through the
processor using DMA (Direct Memory
Interconnection Structure:
Bus Interconnection
• A bus is a communication pathway consisting of
lines and, it is connecting two or more devices
• A bus is considered as a shared transmission
medium allowing multiple devices to connect to it
• However, only one device at a time can
successfully transmit
• Several lines of the bus can be used to transmit
binary digits simultaneously
Interconnection Structure:
Bus Interconnection
• For example:
– An 8-bit unit of data can be transmitted over 8-bus
• A bus that connect the major computer components
(CPU, Memory, IO) is called System Bus
• A system bus may consist of 50 to hundreds of
separated lines. Each line has a particular function.
• The Interconnection Structures are based on the use of
one or more system buses.
Interconnection Structure:
Bus Interconnection
• Bus Lines can be classified based on 3 functional groups:
Interconnection Structure:
Bus Interconnection
• Bus Lines can be classified based on 3
functional groups:
• 1. Data Lines
Provide pathway for moving data between system modules
These lines are called Data Bus
The lines (32 to hundreds) referred to as the width of the bus
The width determines the overall system performance
e.g. If the data bus is 8-bit wide, and each instruction is 16bit long, then the processor must access the memory
module twice during each instruction cycle
Interconnection Structure:
Bus Interconnection
• 2. Address lines
– Are used to determine the source or destination of the
data on the data bus.
– For example:
• The CPU puts the address of the desired word to be read
from / or written to memory on the address lines
– The width of the address bus determine the maximum
addressable memory.
– The address lines are also used to address I/O ports
– Typically:
Interconnection Structure:
Bus Interconnection
• Typically:
– A higher-order bits are used to select a particular module on the
– A lower-order bits are used to select a memory location or I/O
port within the module
• For example: On an 8-bit address bus
– address 01111111 and below might reference
locations in memory module (128 words)
– address 10000000 and above may refer to devices
attached to an I/O modules.
Interconnection Structure:
Bus Interconnection
• 3. Control Lines
– Are used to hold control signals to control the access
and the use of data and address lines since these
lines are shared by all components
– control signals transmit command and timing
information between system components
• Timing signal indicates the validity of data and adress
• Command signals specifies the type of operations to be
Interconnection Structure:
Bus Interconnection
• Control lines includes the following operations
Interconnection Structure:
Bus Interconnection
• Main operations of the Bus
If a module wishes to send data to another module
it must so two things
– Obtain the use of the bus
– Transfer data via the bus
If a module wishes to request data from another
module it must so two things
– Obtain the use of the bus
– Transfer a request to the other module over
appropriate control and address lines
– Wait for the other module to send the data
Interconnection Structure:
Bus Interconnection
• Typical Bus Architecture
Metal lines put
in printed circuit
board, the bus
extends across
over all the
Interconnection Structure:
Bus Interconnection

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