### Combinational Logic Circuits

```Arithmetic Functions and HDLs
Chapter 4
1
X
+Y
----CS
2
X
Y
+Z
----CS
3
4
5
Binary subtraction (for unsigned
binary number)
 11100 (借位)
10011 (被減數)
- 1 1110 (減數)
--------------------------------10101 (差)
-01011 (正確差)
6
Example
 X=1010100; Y=1000011
 X-Y:
1010100
+ 0111 101 (27-Y)
----------------------------10010001 (X-Y)
 Y-X
1000011
+ 0101100
----------------1101 1 11
- 0010001
7
Signed binary numbers
 Eg. -9
Sign-mag. 10001001
Sign-1’s 11110110
Sign-2’s 11110111
8
S0
C0
FA
S
B
A
If S=0, B  0  B
S0  A  B
C1
If S=1=C0, B  1  B
S0  A  B  1
9
(sub)
Example
 +6 00000110
+13 00001101
------------------------------+19 00010011
 -6 1 1 1 11010
+13 00001101
------------------------------+7 00000111
 +6 00000110
-13 1 1 1 10011
------------------------------7 1 1 1 11001
 -6 11111010
-13 11110011
------------------------------19 11101101
10
Overflow
Overflow detection logic for addition and subtraction
11
Multiplication
12
B3
B2
B1
B0
A2
A1
A0
-----------------------------------------------------------0 A0B0 A0B2 A0B1 A0B
C A1B3 A1B2 A1B1 A1B0
A2B3 A2B2 A2B1 A2B0
-----------------------------------------------------------C6 C5
C4 C3
C2
C1
C0
13
 4
0100
+8
1000
--------------------------------------------12
1100
+0110
--------------------------------------------1 0010
(1) (2)
 4
0100
+5
0101
------------------------------------------9
1001
14
8
1000
+9
1001
--------------------------------------------17
1 0001
+0110
--------------------------------------------1 01 11
(1) (7)
15

S3S2S1S0
16
```