### States

```Lecture 11
First-order Circuits (1)
Hung-yi Lee
Dynamic Circuits
Capacitor,
Inductor
(Chapter 5)
Time
Domain
(Chapter 9)
Frequency
Domain
(Chapter 6,7)
Abstract
S-Domain
(Chapter 11,13)
Textbook
• First-Order Circuits
• Chapter 5.3, 9.1
First-Order Circuits
• Containing only one capacitor or inductor
The networks excluding capacitor or inductor only
contains sources and resistors.
Can always be simplified by Thevenin or Norton
Theorem
First-Order Circuits
RC:
i sc
RL:
i sc
First Order Circuits
v oc t  , i sc t  (this lecture)
voc and isc should be dynamic
…
t
t0
…
t
t0
…
t1
i sc
t2
t
…
…
t0
t
Unit Step Function
Perspective
• Differential Equation
• Superposition
• State
Perspective 1:
Differential Equation
Zero-Input Response - RC
v  V o u  t  t 0 
…
t0
t
Zero-Input Response - RC
Find vc(t) and ic(t)
t  t0
Capacitor is open circuit
i c t   0
v c t   V o
Zero-Input Response - RC
Find vc(t) and ic(t)
t  t 0
Capacitor is open circuit
i c t   0
v c t   0
Zero-Input Response - RC
Find vc(t) and ic(t)
t  t0
?
t  t0
t  t 0
?
t  t 0
Zero-Input Response - RC
t  t0

vC (t 0 )  V 0

vC (t 0 )  V 0
ic(t0) is unknown
Voltage on the
capacitor should
be continuous
Zero-Input Response - RC
t  t0

vC (t 0 )  V 0

vC (t 0 )  V 0
RC
ic(t0) is unknown
dv C ( t )
dt
 vC (t )  0
Assume v C ( t )  Ae
RC  Ae
iC ( t )  C
dv C ( t )
dt
t
t
 Ae
RC   1  0
t
0

1
RC
Zero-Input Response - RC
v C ( t )  Ae
 Ae

Ae
1
RC
t0
t


1
1
RC
t
1
A  V0e
 V0
1
vC (t )  V 0 e
RC
t0

e
1
RC
t
 V0e

1
RC

iC ( t )  C
dv C ( t )
dt


vC (t 0 )  V 0
vC (t 0 )  V 0
RC
 C Vo
de
RC
t0
t  t0 
1
RC
t  t0 

dt
Vo
R

e
1
RC
t  t0 
Zero-Input Response - RC
vC (t )  V 0 e

1
RC
t  t0 
iC ( t )  
Vo
R

e
1
RC
t  t0 
Zero-Input Response - RC
vC (t )  V 0 e
…
vC (t )  V 0 e
Vo
dv C ( t )

dt
v C (t )
Vo

Vo

RC
t  t0 
  RC
t
t0
1

Vo
Vo


e
1


1

t  t0 
t  t0 
dv C ( t 0 )

dt
Vo
Vo

Zero-Input Response - RL
i  I o u  t  t 0 
i
…
t0
t
Zero-Input Response - RL
iL (t )  I 0 e
I0

R
L
t  t0 
v C ( t )   RI 0 e
v L (t )
iL (t )
- RI 0

R
L
t  t0 
Zero-Input Response
…
t0
vC (t )  V 0 e
iL (t )  I 0 e
 RC
  L
 R
y (t )  Y0 e
Voltage of C,
Current of L

1
RC

R
L

t  t0 
t  t0 
t-t0 
Voltage,
Current

How fast?
t
Step Response - RC
v  V o u t  t 0 
…
t0
t
t  t0
Step Response - RC
• Solved by differential equation
t  t0
v  t   V o u t  t 0 
v c t   0
t  t 0
v c t   V o
t  t0
  0
Ri c t   v c t   V o
vc t
  0

0
RC
vc t
dv c t 
dt

0
 v c t   V o
Step Response - RC
RC
dv c t 
dt
  0
 v c t   V o
v c t   v N t   v F t 
vN(t) is the solution of
vF(t) is the solution of
RC
vc t
vN(t) is general solution
vF(t) is special solution
dv c t 
dt
RC

0
dv c t 
dt
 v c t   0
v N ( t )  Ae
 v c t   V o
v F t   V o

t
RC
Step Response - RC
RC
dv c t 
dt
v c t   v N t   v F t 
v c t   Ae
  0
 v c t   V o

vc t
v N ( t )  Ae
t
RC
 Vo

0

Ae

t
RC
v F t   V o
t0
RC
 Vo  0
t0
1

t  t0  


v c t   V 0  1  e RC




A   V o e RC
Step Response
…
t0
t
1

t  t0  

RC

v c t   V 0  1  e




R
 t  t0  


i L t   I 0  1  e L




 RC
  L
 R
t-t0 





y (t )  Y0  1  e




Voltage of C, Voltage,
How fast?
Current
Current of L
Step Response
t-t0 





y (t )  Y0  1  e




Y0
Y0
…
t0
t
Step Response
…
t
t0
t-t0 





y (t )  Y0  1  e




Y0
Y0
Rise time
Y0
10% time
90% time
Step Response + Initial Condition
t  t0
  0
vc t

0
  V
vc t

0
x
Step Response - RC
RC
dv c t 
dt
  V
 v c t   V o
vc t
v c t   v N t   v F t 
v c t   Ae

Ae

v N ( t )  Ae

x
t
RC
v F t   V o
t
RC
 Vo
v c t    V x  V 0 e
t0
RC

0
 Vo  Vx
t0
A   V x  V o e RC

1
RC
t  t0 
 V0
Perspective 2:
Superposition
Step Response
• Solved by Superposition
v t   V o u   t  t 0 
vC (t )  V 0 e

  RC
v t   V o u t  t 0 
vC (t )  ?
1

t  t0 
Step Response
…
t0
t
v 2 t 
=
…
…
t0
v 1 t   V o
  V o u  t  t 0 
t
-
Suppress v1, find vc2(t)
Suppress v2, find vc1(t)
…
t0
t
v c t   v c 1 t   v c 2 t 
Step Response
v t 
 V o u  t  t 0 
vC (t )  V 0 e
v C 2 ( t )  V 0 e
v 2 t 
  V o u  t  t 0 

1


1

t  t0 
t  t0 
vC 1 (t )  V 0
vC (t )  vC 1 (t )  vC 2 (t )
v 1 t   V o
1
 t  t0  


 V0  1  e 




Pulse Response
v t 
Vo
RC
dv c t 
dt
 v c t   v t 
Solved by Superposition
Pulse Response
t0
=
0

1
 
 t 
vC 1 (t )   
V0 1  e  

 

 
v t 
Vo
t0
…
vC 1 (t )
tD
0
D
-
0

t  D 
 


vC 2 (t )   
V0 1  e  

 

 
Vo
tD
Vo
…
vC 2 (t )
0
D
Pulse Response
0

1
 
 t 
vC 1 (t )   
V0 1  e  

 

 
v C (t )
V0
vC (t )  vC 1 (t )  vC 2 (t )
0

t  D 
 


vC 2 (t )   
V0 1  e  
t0

 

 
t0

V0  1  e



D





tD
tD
 D
 t
V0  e   1  e 




Pulse Response
If
D  
e  1 x
x
V0
(If x is small)
D

V0
v C (t )
V0

V0  1  e



D





D


e
t

 D
 t
V0  e   1  e 




Step Response + Initial Condition
  V
vc t
v c t    V x  V 0 e

1
RC
t  t0 

0
 V0
Violate Superposition?
x
Step Response + Initial Condition
 

vc t0  V x
The initial condition is
automatically fulfilled.
Vx
Do not have to
consider the initial
condition anymore
Step Response + Initial Condition
Vx
Vx
Zero-Input Response!
Step Response
(without initial condition)!
t  t0  

RC




v
t

V
1

e
RC
c2
0
v c 1 t   V x e



1
1

t  t0 

t  t0  


v c t   v c 1 t   v c 2 t   V x e RC
 V 0  1  e RC





1
t  t0 

1
Step Response + Initial Condition
Differential
Equation
Superposition
v c t  
v c t  
 V x  V 0 e
General
solution

1
RC
t  t0 
 V0
Special
solution
The initial condition is
considered in the general
solution term.

Vxe
1
RC
t  t0 
Zero-input
Response

 V0  1  e



1
RC
t  t0  
Step Response
The initial condition is
automatically fulfilled.



Perspective 3:
State
State
• The capacitor voltages and inductor currents
constitute the state variables of any circuit. (P410)
If the circuit does not have any
capacitor or inductor
The currents or voltages at time t
do not depend on their values not
at t.
Why?
v ( t )  Ri t 
State
• The capacitor voltages and inductor currents
constitute the state variables of any circuit. (P410)
With capacitor or inductor
 V0
v t   
 0
t  t0
t  t0
You can not explain the current
or voltage at present unless
considering the past.
State
• The capacitor voltages and inductor currents
constitute the state variables of any circuit. (P410)
i (t )  C
dv ( t )
v (t ) 
C
dt
v t   v t 0  
1
1
C
 i  d 
t
t0
If we know the
voltage before at t0
 i  d 
t

 v t 1  
1
C
 i  d 
t
t1
the current before t0
Capacitor voltages are States
……
State
• The capacitor voltages and inductor currents
constitute the state variables of any circuit. (P410)
v t   v t 0  
1
C
 i  d 
t
t0
State at t0
Source after t0
v t   v state t   v input t 
 
State

vc t0  V x
• The capacitor voltages and inductor currents
constitute the state variables of any circuit. (P410)
v c ( t )  v state t   v input t 
The response after t0
v c t   V x e

1
RC
t  t0 
From state at t0
(Ignore input)
1

t  t0  


 V 0  1  e RC




From Input after t0
(Ignore state)
Response
y(t): voltage of capacitor or current of inductor
y(t) = general solution + special solution
=
=
= natural response + forced response
= state response (zero input)
+ input response (zero state)
Zero-Input Response
…
t0
t
v c ( t )  v state t   v input t 
Considering the circuit from t0:
Ignore everything
before t0
State: vc(t0)=V0
Lead to v state t 
No input after t0
v input t   0
Zero-Input Response
v c ( t )  v state t   v input t 
v input t   0
State: vc(t0)=V0
v state ( t )  V 0 e
v c t   v state ( t )  V 0 e


1

1

t  t0 
t  t0 
Zero-Input Response
v  V o u  t  t 0 
…
t0
t
v c ( t )  v state t   v input t 
Considering the circuit from t0-D:
State: vc(t0-D)=V0
Input after t0-D
t0  D
t0
t
Zero-Input Response
v c ( t )  v state t   v input t 
State: vc(t0-D)=V0
v state ( t )  V 0 e
Input after t0-D
v input (t )

1

t  t0  D 
t
t0  D
t0
t0  D
1
 t  t0  D  


V0 1  e 




t0
 D
  t  t0  D 

V0  e   1  e




Example 9.4
t0
0  t 1
t 1
6 k
 12 V
4 k
12 V
  0
v0
Example 9.4

t0
  0
v0

  0
v0

Example 9.4
  0
v0

    9 .73
v1

0  t 1
State response:

v 0   0
No state response
6 k
Input response: v oc   12 V

v t   V 0  1  e


t  t0

t


   12  1  e 0 .6








 12 V
Example 9.4
  0
v0

    9 .73
v1

0  t 1
6 k
 12 V
State response is zero
Example 9.4
  0
v0

    9 .73
v1

t 1
State response:
t  t0

v t   V x e 
4 k
Input response:
t  t0


v t   V 0  1  e 






12 V
Example 9.4
  0
v0
    9 .73

v1

t 1
State response:
v t    9 . 73 e
Input response:

4 k
t 1
0 .4
t 1



v t   12  1  e 0 .4 




12  21 . 73 e

t 1
0 .4
12 V
Example 9.4
t


 12  1  e 0 .6






12  21 . 73 e
i t   100  F
dv t 
dt

v t 
24 k 

t 1
0 .4
Application:
Touchscreen
Resistive Touchscreen

http://www.analog.com/library/analogdialogue/archives/44-02/touch_screen.html
Capacitive Touchscreen

Before Touching
Finger is Touching
http://www.eettaiwan.com/ART_8800583600_480702_TA_bc13e6c4.HTM
Homework
• 9.14
• 9.16
Homework - Stability
• The first-order circuit shown below is at steady
state before the switch closes at t=0. This circuit
contains a dependent source and so may be
unstable. Find the capacitor voltage, v(t), for t>0.
Homework - Stability
• The gain of the dependent source below is B. What
restrictions must be placed on the gain to ensure
that the circuit is stable? Design this circuit to have
a time constant of +20ms.
Thank you!
Homework
• 9.14
t
0tD
tD
• 9.16
v L t   10 e 2 D
v L t    3 . 93 e
v C  D   8 . 65
v C  2D   1 . 17
v C 3D   8 . 81
 t  D 
2D
Stability
• The first-order circuit shown below is at steady
state before the switch closes at t=0. This circuit
contains a dependent source and so may be
unstable. Find the capacitor voltage, v(t), for t>0.
 0 .2 m
 0 . 1m
t
v t   24  12 e 20
 0 .4 m
1V
0 . 1m
Stability
• The gain of the dependent source below is B. What
restrictions must be placed on the gain to ensure
that the circuit is stable? Design this circuit to have
a time constant of +20ms.
B  3/2
B 1
Acknowledgement
• 感謝 莊佾霖(b02)
• 指出投影片中 Equation 的錯誤
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