Lecture 13 - MemoryOrganization1

Report
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CS 325: CS Hardware and Software
Organization and Architecture
Memory Organization
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Computer Systems Structure
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Storage Hierarchy & Characteristics
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Storage/Memory Hierarchy
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Principle of Memory Hierarchy
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To optimize memory performance for a given cost:
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A set of technologies are arranged in a hierarchy that contains a
relatively small amount of fast memory and larger amounts of less
expensive, but slower memory.
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Memory Hierarchy Importance
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1980: no cache on CPU
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1995: 2-level cache on CPU
1989: first Intel CPU with cache on chip
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Memory Storage Characteristics
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Location
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Capacity
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Unit of transfer
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Access method
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Performance
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Physical type
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Physical characteristics
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Organization
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Memory Storage - Location
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CPU
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Internal
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Registers
L1, L2, L3, L4 Cache
Main Memory (System RAM)
BIOS (EEPROM)
External
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Magnetic Disk (HDD)
Non Volatile Solid State (SSD)
Optical
Magnetic Tape
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Memory Storage - Capacity
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Word size
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The natural unit of organization
Expected size of most data and instructions
Typically 32 bits or 64 bits
 Past: 16 bits
Typical Storage
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L1 Cache: 32 – 64 KB per core
L2 Cache: 128 – 512 KB per core
L3 Cache: 2 – 8 MB (shared)
L4 Cache: 0 – 128 MB (video memory)
Main Memory (RAM): 4 – 32 GB (Typical Desktop)
HDD Cache: 16 – 64 MB
SDD: 64 – 512 GB
HDD: 200 – 2000 GB (Inexpensive, but extremely slow)
Optical:
 DVD: 4.7 – 17.08 GB
 Blu-ray: 25 – 100 GB
Magnetic Tape: 10 – 35 TB per cartridge (uncompressed)
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Memory Storage – Unit of Transfer
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Internal
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External
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Usually governed by data bus width
Usually a block which is much larger than a word
Addressable unit
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Smallest unit which can be uniquely addressed
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Byte internally (typically)
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Memory Storage – Access Methods
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Sequential (tape):
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Shared read/write mechanism
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Start at the beginning and read through in order
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Access time depends on location of data and previous location of
magnetic tape
Direct (disk)
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Shared read/write mechanism
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Individual blocks have unique address
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Access data by jumping to vicinity plus sequential search
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Access time depends on location of data and previous location of
read/write mechanism
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Memory Storage – Access Methods
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Random (RAM):
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Individual addresses identify locations exactly
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Access time is independent of location or previous access
Associative (Cache):
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Data is located by a comparison with contents of a portion of the
store
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Access time is independent of location or previous access
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Memory Storage – Performance
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Latency/Access time
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Time between presenting the address and getting the valid data
Memory Cycle time
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Time may be required for the memory to “recover” before next
access
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Cycle time is latency + recovery
Transfer Rate
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Rate at which data can be moved
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# of bits * (1/cycle time)
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Performance – Transfer Rate
Example Problem
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Assume we have a 32-Mbit SDRAM memory with 8 bits
simultaneously read and a cycle time of 250 ns.
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How fast can data be moved out of memory?
8b * (1/250ns)
= 8b * (4x106/s)
= 32 Mbps
= 4 MBps
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Memory Storage – Physical Types
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Semiconductor
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Magnetic
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HDD
Tape
Optical
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Cache
Main Memory (RAM)
SSD
CD
DVD
Blu-Ray
Others
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Bubble
Hologram
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Memory Storage – Physical
Characteristics
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Volatility
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Erasable
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Power consumption/Heat
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Memory Storage – Organization
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Physical arrangement of bits into words
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Not always obvious
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Striped across multiple disks
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Memory Storage – RAID
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RAID: Redundant Array of Inexpensive Disks
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Combines multiple disks into a logical unit for the purposes of
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Data redundancy
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Performance Improvement
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Or both
Can be implemented by software or hardware
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Software: OS controlled
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Hardware: Physical RAID controller
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Memory Storage – RAID Levels
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RAID 0
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RAID 1
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Striped data without parity or mirroring. Performance increase.
Mirrored data without parity or striping. Fault tolerance.
RAID 5 (most common)
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Striped data with distributed parity. Requires at least three disks.
Performance increase with Striped data and Fault tolerance. Can
still operate with one failed drive.
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Memory Storage – Bottom Line
How
much?
 Capacity
How
fast?
 Performance
How
expensive?
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Memory Storage – Hierarchy List
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Registers
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L1 Cache
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L2 Cache
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L3 Cache
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Main Memory
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Disk Cache
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SSD
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HDD
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Optical
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Tape
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Memory Basics
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Main Memory Basics
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Memory: Where computer stores programs and data
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Bit (binary digit): basic unit (8 bits = 1 byte)
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Each memory cell (location) has an address numbered 0,…,n-1
(for n memory cells)
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Possible address range limited by address size
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m bits in address means 2m addresses
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Memory cell size (typically 1 byte) grouped together into words
(typically 32 or 64 bits)
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32 bit computer will typically have 32 bit registers and
instructions for manipulating 32 bit words
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64 bit computer will be similar
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Semiconductor Memory
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Random Access Memory (RAM):
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All semiconductor memory is random access
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Directly accessed by address logic
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Read/Write
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Volatile
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Requires constant power supply
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Temporary storage
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Static
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Holds data
Dynamic
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Periodically refreshes charge
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Static RAM
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Bits stored as on/off switches (transistors)
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No charges to leak
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Does not need refresh circuits
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No refreshing needed when powered
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Larger per bit
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More expensive
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Faster
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Example:
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Cache Memory:
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SRAM Illustration
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When write enable is high, output is the same as input.
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Otherwise, output holds previous input value
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Dynamic RAM
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Bits stored as charge in capacitors (also uses transistors)
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Charges leak from capacitors
Needs refreshing, even when powered
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Needs refresh circuits
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Smaller per bit
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Less expensive
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Slower
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Asynchronous and Synchronous DRAMs
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Example:
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Main memory
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DRAM Illustration
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When write enable is high, output is the same as input.
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Otherwise, output holds previous input value
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Includes capacitor refresh circuits
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Read Only Memory (ROM)
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Permanent storage
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Microprogramming
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Library subroutines
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Systems programs
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Function tables
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Measures of Memory Technology
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Density
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Latency and cycle time
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Memory Density
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Refers to memory cells per square area of silicon
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Usually states as number of bits on standard chip size
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Examples:
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Memory cells typically structured in arrays
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1 mb chip
4 mb chip
1Mb x 1 chip
256 Kb x 4 chips
Note: higher density chip generates more heat
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Memory Packaging: Chips
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16 Mbit chip (4M x 4)
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WE = Write Enable
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OE = Output Enable
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RAS = Row Address Select
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CAS = Column Adress Select
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A0 – A10 = 11 address bits
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D1 – D4 = Data to be read/written
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NC = No connect, for even # of pins
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Vcc = Power Supply
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Vss = Ground Pin
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Read-Write Performance
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In many memory technologies, the time required to fetch
information from memory differs from the time required to
store information in memory.
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This difference can be dramatic.
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Performance is then determined by Read and Write
operations.

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