Flip Flops

Report
Flip-Flops
RS Flip-flop
S
X
Inputs
Outputs
R
X
RS Flip-flop - definition
Inputs
Output
S
R
0
0
Unchanged
1
0
X 1 X  0
0
1
X  0  X 1
1
1
Not allowed
RS Flip-flop waveforms
Types of flip-flops:
a) dynamic
b) synchronized
E
x
a
m
p
l
e
Example continuation
RS flip-flop formed by cross-coupling NOR gates
RS flip-flop formed by cross-coupling NAND gates
Transfer circuit
RS latch
D latch
Shift register
The progression of states by the counter
X3
X2
X1
0
0
0
0
0
1
0
1
0
0
1
1
1
0
0
1
0
1
1
1
0
1
1
1
0
0
0
…
…
…
Example: Binary counter
Example: Gated-clock binary counter
JK flip-flop
Example:
Binary
counter
made with
JK flip-flops
Example:
Up-down
counter
Integrated
circuits
Counter design:
Design rule for RS flip-flops
The present
state
The next state
S
R
0
0
0
d
1
1
d
0
0
1
1
0
1
0
0
1
Counter design: Exercise (RS version)
Design a counter using three RS Flip-Flops
to sequence as follows
A
B
C
0
0
0
1
1
1
1
0
1
1
1
0
0
0
1
0
1
0
0
0
0
1
1
1
1
0
1
...
...
...
Solution: (RS version)
Solution: Counter with RS flip-flops
S
R
A
S
R
B
S
R
C
Counter design:
Design rule for JK flip-flops
The present
state
The next state
J
K
0
0
0
d
1
1
d
0
0
1
1
d
1
0
d
1
Counter design:
Exercise (JK version)
Design a counter using three JK Flip-Flops
to sequence as follows
A
B
C
0
0
0
1
1
1
1
0
1
1
1
0
0
0
1
0
1
0
0
0
0
1
1
1
1
0
1
...
...
...
Solution: (JK version)
Counter with JK flip-flops

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