Foundry Certified Cadence DFM Turnkey Service Signoff Seminar November 2013 Rudy Mason- Senior Staff Application Engineer – VCAD Background • Litho Process Check (LPC) is required for TSMC 28nm process nodes and below and is recommended at larger process nodes • Chemical Mechanical Polishing check (VCMP) is recommended for TSMC 45nm, 40nm and 28nm process nodes • Cadence DFM Service is customized to the customer’s needs and scheduled to provide fastest turn-around for LPC or VCMP checks. Analysis can be performed on – Early design data – Close to tapeout design data – Final tapeout data 2 © 2013 Cadence Design Systems, Inc. All rights reserved. DFM Introduction DRC clean is not sufficient Litho • Litho process check (LPC) – Problem: Some DRC-clean layouts do not print on silicon – Solution: Must-have litho hotspot detection and fixing of design with foundry-certified tools – TSMC certified tool: Litho Physical Analyzer • Chemical-Mechanical Polishing (CMP) – Problem: Copper erodes during CMP step and leads to yield loss and reliability issues – Solution: Must-have CMP hotspot detection and fixing using foundry-certified tools – TSMC certified tool: Cadence CMP Predictor CMP Oxide Loss Isolated Thin-Lines Dishing Isolated Wide-Lines Total Copper Loss Dense Array Thin-Lines Dense Array Wide-Lines Foundries demand that new DFM verification standards are met by the customer prior to agreeing to manufacture 3 © 2013 Cadence Design Systems, Inc. All rights reserved. Cadence LPC Service (Litho Process Check) • Cadence will analyze customer’s GDSII database with production proven Litho Physical Analyzer (LPA) software to ensure layout meets TSMC’s DFM requirements for Lithography Process Check – Customer data must be DRC clean • Cadence LPA is qualified by TSMC to simulate the actual resist shapes created at each photo step on all critical mask layers – LPA is TSMC's golden engine for 40nm and 28nm – LPA has been the first to qualify at TSMC 65-28nm nodes, – LPA is used in the TSMC ISF flows • Hotspots identified by LPA like pinch and bridge patterns may pass DRCs, but are known to pose yield issues that can be avoided 4 © 2013 Cadence Design Systems, Inc. All rights reserved. Cadence CMP Service • Cadence will analyze customer’s GDSII data base with production proven Cadence CMP Predictor (CCP) software to ensure layout meets all TSMC’s DFM requirements for VCMP check. – CCP simulates the interconnect copper thickness over customer’s layout. • Cadence CMP Predictor tool is qualified by TSMC and uses the latest available DDKs (DFM Data Kits) and engines to simulate TSMC’s CMP process • Hotspot locations that will not meet required thickness control specifications are detected and fed back to the customer to improve the layout 5 © 2013 Cadence Design Systems, Inc. All rights reserved. Benefits of Cadence DFM Services • Sign-off analysis compliance: ensures compliance to TSMC DFM checking mandate • Lowest total cost of ownership: No investment in software tools, multiCPU infrastructure and learning of new tools • Efficient access: provides priority turnkey access to TSMC Golden DFM analysis both prior to and at tape-out • Reduced schedule risk: allows the customer to verify DFM compliance early with an Initial Top Level GDSII run • Optimal time-to-results: harnesses 50-100 dedicated CPUs/run in our server farm for fast turn-around time • Security: leverages a highly reliable and state-of-the-art IT and security infrastructure which ensures protection from unauthorized access. • Leverage Cadence expertise: leverages team with many man years of experience and combined resources of Cadence Design Services and R&D • Low risk learning experience: provides a learning experience for designers to understand DFM while designing with advanced process nodes • Automated repair: Output report enables automated fixing of LPC hotspots in Cadence Encounter or Virtuoso implementation flows 6 © 2013 Cadence Design Systems, Inc. All rights reserved. LPC Service Solution • Customer provides Initial Top Level GDSII database • Cadence performs LPA analysis to meet TSMC’s LPC requirements • Deliverables LPC Output: – Hotspot locations and level of severity reported after each run with guidelines for modifying layout to remove the highest priority yield detractors. – Output files enable auto fixing with Cadence Encounter or Virtuoso implementation flows – Comprehensive report file for the foundry Consultation as needed to fix the yield detractors • The Updated Top Level GDSII database with “fixes” will be run again to confirm LPC DFM compliance 7 © 2013 Cadence Design Systems, Inc. All rights reserved. CMP Service Solution • Customer provides Initial Top Level GDSII database • Cadence performs CMP analysis to meet TSMC CMP requirements • Deliverables CMP Output: – Metal density distribution (heat map) and histogram chart – Metal thickness distribution (heat map) and histogram chart – Hotspot locations with type of errors Consultation as needed to fix the yield detractors • The Updated Top Level GDSII database with “fixes” will be run again to confirm CMP DFM compliance 8 © 2013 Cadence Design Systems, Inc. All rights reserved. Customer Provided Data • Customer provides GDSII/OASIS input for each DFM Analysis – FTP compressed, encrypted GDSII/OASIS to a secure Cadence drop-box (Data should be DRC clean with respective log information) – Identification of all technology information, process options, and CAD layers should be included • Required GDSII layers – LPC: OD, PO, CO, M1, VIAx and all Mx – CMP: M1, all Mx, My, Mz, Mr 9 © 2013 Cadence Design Systems, Inc. All rights reserved. Summary • Cadence’s provides end-to-end TSMC certified DFM signoff analysis which ensures compliance to TSMC’s DFM recommendation • Over 75 DFM runs completed so far • Offers a secure and risk-free alternative to in-house DFM signoff and complements efficiently in-Design DFM Analysis • Cadence provides expertise leveraging TSMC certified tools, methodologies, processes and use models to provide the fastest turnaround time • Can be combined with In-Design tool solution for block screening 12 © 2013 Cadence Design Systems, Inc. All rights reserved.