April 30, 2014

Report
20nm/14nm process technologies
for FPGAs
Benefits and Challenges
Avner Uzan - Eastronics
April 30, 2014
1
Semiconductor Industry Moving to
FinFET
April 30, 2014
3
The Invention of the Transistor – Electronics Era
Begins
In 1947, Bardeen, Brattain, and Shockley invented the first (bipolar)
transistor – awarded the 1956 Nobel Prize in Physics
April 30, 2014
4
M. Atalla
D. Kahng
~10 Years later – The Modern MOSFET is Born
For the next 50+ years the
2D structure of the
MOSFET transistor remains
unchanged
April 30, 2014
5
1991: The First 3D “FinFET” transistor
D. Hisamoto
DELTA = DEpleted Lean-channel TrAnsistor
April 30, 2014
6
1999: The Term for the 3D Transistor “FinFET” is
Coined
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7
The End of the 2D Planar Transistor: May 4, 2011
Source: http://newsroom.intel.com/community/intel_newsroom/blog/2011/05/04/intel-reinvents-transistors-using-new-3-d-structure
April 30, 2014
8
8
3D Transistor (Tri-Gate and FinFET) Structure
SOURCE: Mark Bohr, Intel Developer’s Forum 6 Sept 2011
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3D Transistor (Tri-Gate and FinFET) Advantage
Summary
Intel’s 14 nm
Tri-Gate
Technology
Higher Effective
Channel Width
Lower Leakage
Current
And 2nd Generation
Allows smaller
Technology
junction sizes
Higher
Densities
> 2X Core
Performance
> 50% Power
Reduction
Improved SEU
April 30, 2014 Resistance
Technology
Leadership
11
Heterogeneous Computing,
a major market trend
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Heterogonous Computing
• Heterogeneous computing refers to systems
that use more than one kind of processor
• These are multi-core systems that gain
performance not just by adding cores, but also
by incorporating specialized processing
capabilities to handle particular tasks
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13
Heterogonous Computing
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14
Heterogeneous Computing Is A Major Industry
Trend
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15
Heterogeneous Computing Is A Major Industry
Trend
“Heterogeneous computing
will drive big changes in
the markets for all discrete
processing technologies.”
October 2013
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16
ALTERA’s “Generation 10” FPGAs
FPGAs and SoCs
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17
Extending Altera’s Tailored Approach With 14 nm
Today’s Portfolio
Generation 10 Portfolio
28HP
14 nm
Tri-Gate
28LP
20 nm
MAX®10
55 nm
Single Node - 28 nm
Multiple Nodes - 14 nm, 20 nm,
55 nm
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18
Breakthrough Advantages
Delivering Unimaginable Performance
 Intel 14 nm Tri-Gate process



2x increase in performance
70% power savings
3rd-generation processor system
Reinventing the Midrange
 TSMC 20 nm planar process



15% faster than current high end family
40% power savings versus current midrange
50% processor system improvement
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Heterogeneous Computing with SoC
Technology
CPU
Subsystem
+
ALTERA® SDK
FOR
OPENCL
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LOW POWER
HIGH PERFORMANCE
Altera SoC Product Portfolio
LOW END SoCs
(Lowest Power, Form Factor & Cost)
MID RANGE SoCs
HIGH END SoCs
(High Performance with Low Power, Form Factor & Cost)
(Highest Performance & System Bandwidth)
•
•
•
•
•
•
•
•
•
•
•
•
•
28nm TSMC
925 MHz Dual ARM CortexTMA9 MPCoreTM
5G Transceivers
400 MHz DDR3
25 to 110 KLE
Up to 224 Multipliers
(18x19)
•
•
•
•
28nm TSMC
1.05 GHz Dual ARM CortexTMA9 MPCoreTM
10G Transceivers
533 MHz DDR3
Up to 462 KLE
Up to 2136 Multipliers
(18x19)
•
•
•
•
20nm TSMC
1.5 GHz Dual ARM CortexTMA9 MPCoreTM
17G Transceivers
1333 MHz DDR4
Up to 660 KLE
Up to 3356 Multipliers
(18x19)
•
14nm Intel Tri-Gate
64-bit Quad ARM A53 MP
CoreTM
Optimized for Max
Performance per Watt
Over 4000 KLE
DEVICE AVAILABILITY
Availability of SoC devices across product portfolio …
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ARM Cortex™-A53 on Intel 14 nm Tri-Gate
Process
High Performance + Power Efficiency
• >6x throughput improvement
• Highest power efficiency
of any 64-bit processor
• Wide portfolio reusability
• Software compatibility
with previous generation
(32-bit mode)
• Cortex-A53 target markets
overlap with Stratix 10 SoCs
(communications infrastructure,
enterprise, datacenter)
April 30, 2014
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Altera’s Heterogeneous Computing Tools
Foundation
Altera® SDK
for
OpenCL
™
Industry’s Only
Industry’s Only
FPGA OpenCL
Solution
FPGA-Adaptive
Debug
The Open Standard for
Parallel Programming of
Heterogeneous Systems
Industry Standard Tools for
Debug and Application Development
of ARM Processors
•

Enables whole chip heterogeneous
debug
and visualization
Mature solution, intensive testing, •
achieved conformance with OpenCL
Khronos standard

ARM-Altera strategic partnership for
ARM
DS-5® Altera Edition
tool
Generates hardware from OpenCL
software; unlocks resources for
software designers
“Because FPGAs enable parallel processing, they are critical for specialized server workloads that
demand real-time performance. We are pleased that our clients are now able to take full advantage
of this technology on power systems using Altera's SDK for OpenCL."
--Robert L. Swann, vice president, IBM PowerApril
Systems
30, 2014
23
Thank you
April 30, 2014
24

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