Report

New England Particle Physics Student Retreat (NEPPSR) Front End Electronics for Particle Detection Case study : ATLAS Muon Spectrometer August 20, 2003 John Oliver • Signal formation in gas detectors • Basic electronic components & noise sources • Noise calculations • Amplifier/Shaper/Discriminators (ASDs) for ATLAS Muon Spectrometer Disclaimer This will be a fairly analytical approach. The idea is to develop a tool-box of methods you will need to analyze similar applications. If you find the need, you can explore any of these subjects in more detail later. You don’t need to memorize this stuff!! Homework There will be numerous examples given as homework. Go as far with them as you can. We’ll go over the solutions Wednesday/Thursday evening. (1) Signal formation in gas detectors Simple example : Uniform electric field in drift gas (eg Ar/CO2) D x (10 mm) Anode Cathode A Vhv (1 kV) Q • Electric field E = 1e 5 Volts/meter • Particle track ionizes N electron/ion(Ar) pairs with total charge N*e = Q • Electrons/ions drift toward Anode/Cathode with velocity given by their mobilities Electrons: ve e E Positive ions: vion ion E m et2 e 0.4 V s m et2 ion 6 105 V s • Question : What signal current i(t) is seen by ideal ammeter in series with battery ? (2) • Electrons drift to Anode, ions to Cathode • First the electrons… In time Dt, electrons move distance Dx vdrift Dt DV E vdrift Dt through potential Work done by field is DW Q DV Q vdrift E Dt Work done by battery is DW Vhv i(t ) Dt In general where vdrift e E i(t ) In this example Q vdrift E Vhv i (t ) Q -------------------- (1) vdrift D const -------------------- (1b) Total signal charge collected in arbitrary time t, q(t ) Q DV (t ) Vhv -------------------- (2) (3) Example : • Q = 1fc , x = 2 mm electron signal current i(t) = 4 nA velocity = E =4*10^4 met/sec time to hit anode = 50 ns total electron signal charge collected in 50 ns q = 4 nA * 50 ns = 0.2 fc ( from eq #2, Q*200V/1kV) i(t) 4 nA 50 ns t What happened to the rest of the ionization charge? Homework : Liquid argon ionization chamber (or calorimeter) • Liquid argon filled gap, horizontal track • e = 0.01 met^2/(V-s) (neglect ion drift) • Ionization density = 7000 electron-ion pairs per mm of track (MIP) • Vhv = 5kV 10 mm Find signal current i(t) Total signal charge Vhv (5 kV) (4) Signals in circular drift tube (ATLAS Muon Spectrometer) • Electric field Vhv 1 E (r ) r ln(R / r0 ) -------------------- (3) • Primary electrons drift to Anode wire • High field at wire surface (~ 2e7 V/m) causes avalanche “centered” very close to wire, typically ~ 10V from wire surface[1] • Each primary electron liberates Qtot ~ 2e4 secondary electrons • Must analyze both electron and ion signal response to single primary electron • Wire radius : r0=25 microns • Tube radius : R= 15 mm • Gas : Ar/C02 (93%/7%) • Vhv = 3080 Volts • Gas gain: G = 2e4 • ion = 6e-5 m^2/V-s • e = 0.4 m^2/V-s Electron signal • Charge centroid very close to wire short collection time , < 1 ns • i(t)=qelectron * d(t) • qelectron= Qtot* DV/Vhv =Qtot * (~10V/3080V) ~ (1/3 % ) Qto t~ 130 e (5) Ion signal • Ion velocity v(t ) ion Vhv dr ion E (r (t )) dt r (t ) ln(R / r0 ) -------------------- (4) • Simple diff-e in can be integrated to give r(t) r 2 (t ) r02 (t ) t t0 t0 -------------------- (5) where t0 is a constant of integration given by, 1 r 2 ln(R / r0 ) t0 0 11ns 2 ion Vhv -------------------- (6) • From (1) i(t ) Q ion i(t ) Q ion Vhv E 2 (r (t )) Vhv 1 t0 [ln(R / r0 )] r02 t t 0 -------------------- (7a) t t 1 ln( 0 ) ln(R / r0 ) t0 -------------------- (7b) 2 and integrated signal charge : qion (t ) Q (6) Pulse properties • Initial current 1 Q i(0) tot 2 ion 23nA 2 r0 -------------------- (8) ion pulse shape normalized current 1.20 1.00 0.80 0.60 0.40 0.20 0.00 0 20 40 60 80 100 tim e (ns) • Extremely long pulse. (See eq #5) Pulse terminates when ions arrive at cathode at time 2 Tmax R t0 4m s r0 • Question: What proportion of charge is collected in time t0 (11ns) ? qion 1 ln(2) 5% Qtot 2 ln(R / r0 ) -------------------- (9) -------------------- (10) Conclusions: • Ion charge is not much but its a lot more then the electron signal charge. For ATLAS MDT its about 1000 electrons for each primary electron. • Electron charge can generally be neglected in simulations & calculations HW: Go through this analysis to make sure you understand it. It will come in handy some day! (7) Basic electronic components & noise sources Part – I : Mathematical note • Circuit analysis is almost always done by means of Laplace (not Fourier) transforms • More convenient than Fourier when circuit is considered quiescent before t = 0 stimulus occurs after t = 0 • Steady state (fixed frequency) response is obtained by sjwj2pf t-domain definition time derivative s-domain f (t ) df (t ) dt F ( s) f (t ) e st dt 0 s F (s ) delay f (t T ) Delta function d (t ) 1 Unit step u(t ) 1 s exponential e t / T e sT F (s) T s T 1 unipolar pulse t t / T e T T ( s T 1) 2 bipolar pulse t t (1 ) e t / T T 2 T s T 2 ( s T 1)3 Universal method of inverting Laplace transforms • Look them up in a table or use Maple or Mathematica (8) Basic electronic components and noise sources Part -II • Inductor Stores energy in magnetic field E = ½ L i2 Impedance Z(s)= sL Lossless, noiseless • Capacitor Stores energy in electric field E = ½ C v2 Impedance Z(s) = 1/(sC) Lossless, noiseless • Ideal transmission line Considered infinite sequence of series inductors & parallel capacitors Results in wave equation with phase velocity : v 1 and a constraint between voltage and current : V Z 0 characteristic im pedance I noiseless Note that an infinitely long transmission line is indistinguishable from a resistor of value Z0 As corollary, a finite line with a resistor of value Z0 at its end, is also indistinguishable from a resistor of value Z0. In other words, if you launch a pulse into a terminated line, it never comes back (no reflection). (9) • Resistor Electric field pushes conduction electrons through a lattice Dissipates power = I*V Conduction electrons (generally) in thermal equilibrium with environment Noisy Noise characterized by “noise power density” p(f) [watts/hz] p( f ) df power(watts) radiatedin frequencyrange f to f df p(f) is frequently expressed as a voltage (in series) or current density (in parallel) 2 e (f) p( f ) n R p( f ) in ( f ) R 2 en(f) & in(f) given in volts/sqrt(hz) & amps/sqrt(hz) To get values of en(f) & in(f) ; [Nyquist, Phys Rev, Vol 32, 1928, p. 110] Length L, total time L/v, Impedance Z0 ½ Z0 in ½ in Z0 Total noise current in cable i 2 tot in2(left) 4 in2( right ) 4 in2 2 (10) • Disconnect resistors trapping noise power in cable • Total energy in cable, in frequency band Df is Energy Df in2 L R Df 2 ccable • Open circuit cable requires current at ends to be zero, and voltage at ends to be nodes • Standing waves (integer number of half-waves) n L 2 • In frequency band Df , number of modes is Dn 2 L Df ccable • Energy equipartition requires that each mode (one for voltage, one for current) corresponds to energy kT/2 Energy Df k T Dn in2 L 2 L R Df k T Df 2 ccable ccable from which we get in 4 k T R & en 4 k T R Independent of frequency “white” noise } ---------------------------- (11) (11) Basic electronic components and noise sources Part III : General circuit analysis primer Objective • To find response of arbitrary circuits to arbitrary stimulus in both time and frequency domains. • Use this to get expected response from MDT Amp/Shaper to o calibration pulses injected into drift tubes o real ion-tail pulses in chambers Method - A • Define ratio of “output” variable to “input” variable : Transfer function: H(s) • Write node and loop equations and solve for transfer function • Delta function response of circuit is just h(t), the inverse transform of H(s) • To get response to other inputs g(t) • Get transform of g(t) G(s) • Transform of response is F(s)=G(s)H(s) • Invert to get f(t) G(s) G(s)H(s) H(s) Simple example Find step response of simple low-pass filter C V1 R V2 1 s C R R H ( s) V1 ( s ) V2 ( s ) 1 s C s T 1 s T where T R C 1 s T 1 s T v2 (t ) e t / T (12) Basic electronic components and noise sources Part III : General circuit analysis primer Objective • To find response of arbitrary circuits to arbitrary stimulus in both time and frequency domains. • Use this to get expected response from MDT Amp/Shaper to o calibration pulses injected into drift tubes o real ion-tail pulses in chambers Method – B • What if method A fails? ie the transforms or inverse transforms cannot be found in closed form • Resort to the time domain solution Convolution integral and use numerical solution if necessary t Vout (t ) g ( ) h(t )d 0 • Simulation (SPICE) (13) General circuit analysis - Homework An ideal integrator is followed by a 2-pole “RC-CR shaper” as follows Unity gain buffers C f (t ) f (t ) dt R 1x R 1x C • Show that transfer function of system is : 1 s s T (1 s T ) 2 (T R C 15ns) a) With delta function input, what do the signals look like throughout the circuit? b) Is this circuit suitable for use in “high rate” (eg LHC/ATLAS) environment? Extra credit part c) Replace ideal integrator (1/s) with “leaky” integrator, 1/(sT+1) with T=15ns • Same questions as (a) and (b) (14) Part-IV : Noise calculations Example # 1 • What is the rms terminal voltage of the following simple circuit? vrms in Solution 1) R 10k Add noise current source, C = 1 pf in 4kT R 2) Solve for circuit “transfer function” This gives you output voltage density • 3) vn ( s) R in 1 s R C set s = jw2pjf Integrate over frequencies (quadrature) 2 vrms | vn2 ( f ) | df 0 2 vrms 4 k T 1 R2 dw R 2 p 0 (1 R 2 C 2 w 2 ) 4 k T 1 1 dx C 2 p 0 (1 x 2 ) where x w RC • In general, such integrals can either be looked up or done by contour integration. 1 1 1 1 2pi p dx 0 (1 x 2 ) 2 ( x i)(x i) 2 2i 2 (15) • In this case, Vrms kT C ---------------------------- (12) • At room temperature kT ~ 4e-21 Vrms 63V • Called “kT over C” noise, or kTC noise (when dealing with charge instead of voltage). • Example (Homework) : Suppose we want to use an array of 100 femtofarad capacitors to build an integrated “voltage waveform recorder” in a 3.3Volt CMOS process. Note that the “switches” are CMOS devices and are actually voltage controlled resistors which switch between some finite resistance in the “On” state to “near infinite” resistance in the “Off” state ADC Vin Assume maximum signal swing inside the circuit is limited to about half the supply voltage, or 1.6 volts What is the maximum possible dynamic range (in bits) of this device? (Dynamic range is max signal divided by rms noise). If we plan to digitize this signal, should we pay more money for a 16 bit ADC, or will a 14-bit ADC do the job? (16) CMOS components : Field effect transistors (nfets) • In undoped (intrinsic) silicon, electron and hole densities are the same • n-doped (arsenic, phosphorous, antimony,..) : electron density increases, hole density decreases • p-doped (boron, aluminum, gallium, ..) : vice-versa • Strength of doping denoted by + sign n, n+, p, p+ • + sign indicates higher doping, lower resistivity Conductive gate electrode Dielectric “gate oxide”: Si02 n+ source and drain implants gate source n+ n+ drain p substrate (~ 10kW/sq) • With Vgate = 0, structure is non-conductive (back to back diodes) • Increasing Vgate in positive direction, attracts electrons from substrate • When Vgate > Vthreshold, “channel” becomes conductive. Conductance increases as Vgate increases. • As Vdrain is made more positive than Vsource, current starts to flow • Voltage gradient appears from drain to source. • Electric field is strongest near source, weakest near drain.. (17) CMOS components : Field effect transistors (nfets) • In undoped (intrinsic) silicon, electron and hole densities are the same • n-doped (arsenic, phosphorous, antimony,..) : electron density increases, hole density decreases • p-doped (boron, aluminum, gallium, ..) : vice-versa • Strength of doping denoted by + sign n, n+, p, p+ • + sign indicates higher doping, lower resistivity Conductive (polysilicon) gate electrode Dielectric “gate oxide”: Si02 n+ source and drain implants gate source n+ n+ drain p substrate (~ 10kW/sq) • With Vgate = 0, structure is non-conductive (back to back diodes) • Increasing Vgate in positive direction, attracts electrons from substrate • When Vgate > Vthreshold, “channel” becomes conductive. Conductance increases as Vgate increases. • As Vdrain is made more positive than Vsource, current starts to flow • Voltage gradient appears from drain to source. • Electric field is strongest near source, weakest near drain. • Channel charge density “tilts” toward source. • Drain current increases with Vdrain • When Vdrain comes within a “threshold voltage” of Vgate, (Vdrain = Vgate – Vthreshold) current “saturates” • Saturation region also called “pinch-off (18) CMOS components : Field effect transistors pfets nfet gate source n+ n+ gate drain drain source p+ p+ n well p substrate (~ 10kW/sq) • Generally, pfet drain current constant, Kp, is about 1/3 that of nfets due to lower hole mobility • For same size transistor at same current, pfet transconductance is smaller by ~sqrt(3) (19) FET properties (simplified model) Idrain Idrain vs Vds for several values of Vgs 1.4 1.2 1 0.8 0.6 0.4 0.2 0 0 0.5 1 1.5 2 2.5 Vds Linear, resistor, or triode region “Saturation” region Drain current properties in saturation region • Id increases quadradically with Vgs I d (Vgs Vth )2 • Increases linearly with transistor channel width, W • Decreases linearly with transistor gate length, L Id 1 W K n (Vgs Vth ) 2 2 L ---------------------------- (13) • Definition: “Transconductance” = ratio of change in drain current per unit change in gate voltage. gm I d W 2 Id Kn Vgs L "Typical"value: Kn 100A / V 2 ---------------------------- (14) (20) FET properties (con’t) Terminal “impedances” • Gate: No dc current flow, just gate capacitance Cgate (of order ~tens of femtofarads to pf) • Drain: “Wiggle” the drain voltage a little, what’s the change in drain current? Ans: no (or very little) change so V Z drain ds I d • Source “Wiggle” the source voltage a little bit. This changes Vgs and thus drain current (and source current) by (Vgs) x (gm). Zs Vs 1 I d g m Typical numbers depending on application; .001 g m .01 or 1kW Z source 100W Example; Idrain = 1 ma, L=0.5u, W=100u gm 2 I d Kn or W 2 (103 ) (100106 ) 200 6.3 103 L Z s 160W (21) Some common FET circuits A) Source follower C) Current mirror d Iin g Vin Iout s Vout Used as (almost) unity gain buffer. Hi-Z in, Lo-Z out. d d g g s Voltagegain 1 s I out I in B) Common source amplifier D) Differential amplifier Gain g m Rload R d Vin g Vout d d g g s s s DI out g m DVin (22) Some common FET circuits – con’t E) Fancier differential amplifier F) Common gate or “cascode” Z1 d d g g s Z2 d Iout g s s Iin • “Boxes” Z1 & Z2 can be whatever you need • example: • Z1 is parallel RC Current gain 1 Used as current buffer. Lo-Z in, Hi-Z out. • Z2 is series RC • Transfer function is H ( s) Z1 ( s) sRC Z 2 ( s) (1 sRC) 2 Implements a “Bipolar” shaping function (See table of Laplace transforms) (23) Noise in Fets • Fet channel is resistive and will thus have a thermal noise current component, in in 4 k T 4 k T gm Reffective • Channel is not a single resistor, but rather a series of increasing resistances (from source to drain) • A fudge factor will be needed! (ff = 2/3) in 8 k T gm 3 R d Vin Vout g en in s • Noise current in drain is equivalent to noise voltage in gate with en en 8 k T 3 gm in gm ---------------------------- (15) (24) Noise in Fets HW • What is the noise voltage density (nV/sqrt(Hz)) of a 100W resistor? • How much transconductance is required of a fet to have this same noise voltage density ? • Assuming we have a power budget of 1 ma (drain current) for this transistor and that the transistor has minimum allowed gate length of L = 0.5 microns, how wide (W) does the transistor have to be? • How much improvement in en do we get by doubling the drain current? …or the transistor width? (25) Front end amplifiers (eg ATLAS MDT) • “Open loop” gain Cstray gm G( s) s Cstray 1x d Vin • Example Cstray = 500ff Gm = 0.006 • What is “unity gain frequency”? g s |G(f)| f ft gm 2 GHz 2p Cstray • What’s the gain at 1 Hz? (26) Front end amplifiers (eg ATLAS MDT) • “Open loop” gain R0 Cstray gm G( s) s Cstray 1x d Vin • Example Cstray = 500ff Gm = 0.006 • What is “unity gain frequency”? g s |G(f)| <100 f ft gm 2 GHz 2p Cstray • What’s the gain at 1 Hz? • Answer: 2x10^9 !!!! • This can’t be right! Actually, gain rarely exceeds 100.Why is this? • Ans: Output (drain) impedance of fet is not actually infinite… same thing for current source G( s) gm g m R0 G0 s Cstray 1 / R0 1 s Cstray R0 1 s T (27) Front end amplifiers (eg ATLAS MDT) To make this a practical amplifier use feedback Rf=15k Cf=1pf G(s) “Transimpedance” amplifier • For high rate environment we want RC to be small ~ 15 ns is optimal for MDTs (electronics + chamber simulations) • Important question is input impedance. In general, it is given by Z in Z feedback Gain •We’d like it to be real or resistive (alternatives are capacitive or inductive) low ( a hundred W or so) as constant over frequency as possible • HW Questions: o Why the above criteria? o How might you go about assuring this? • Second important concept is “Sensitivity” or Peak voltage output per unit charge input (typically in mv/fc) • HW Question: What is the Sensitivity (in mv/fc) of the above circuit? (28) Front end amplifiers (con’t) Now attach this to an ATLAS Muon tube T ( s T 1) T R C Tpeak Rterm=390W and add a shaper Question : Why do we need the terminating resistor? For extra credit (LOTs of extra credit!) • What’s the delta function response at preamp output, shaper output? • Characterize system gain in peak shaper signal output per unit charge input. (volts/coul or mv/fc) • How might you get the response to the actual ion signal from the gas tube? (Don’t actually do it!) • What is the rms noise voltage at the shaper output produced by the terminating resistor? • How much charge is this equivalent to (equivalent noise charge, or enc)? Ans: enc e1 kT Tpeak 5,000 electronsrm s 2 Rterm Hint: For the purposes of this exercise, you can assume input impedance of amplifier is zero. (29) MDT-ASD topology 1 of 8 channels Transimpedance preamps (delta response) Discriminator Bipolar shaper Dummy Wilkinson ADC DACs Calibration Mode Control logic Signal LVDS Deadtime Serial string register (30) MDT-ASD topology Transimpedance Preamplifier Vdd Vb[1:4] are bias voltages supplied from elsewhere Vb4 M4 Vb3 M3 Two transistor current source (Better than single fet current version) M2 Common gate “cascode” IN Common source amplifier Source follower R1 Vb2 Cf OUT R2 M1 Vb1 Current sink (half of a current mirror) Feedback R & C Detailed circuit descriptions can be found in the following documents • ATLAS-MUON-2002-003 Extra conductance on Hihttp://doc.cern.ch//archive/electronic/cern/others/atlnot/Note/muon/muon-2002-003.pdf • ATLAS-MUON-080 Z node to tailor gain vs http://doc.cern.ch/tmp/convert_muon-95-080.pdf frequency, & Zin • muon-96-127 http://doc.cern.ch/cgi-bin/extractFigs.check.sh?check=/archive/electronic/cern/others/atlnot/Note/muon/muon-96-127.ps.gz (31) MDT-ASD preamp layout 180u 300u (32) MDT-ASD topology Shaper differential amplifiers Vdd Vref M5b M5 M5a R Vb2 M4b M4a OUTb M3b M4 OUTa Z1(s) INa M3 M3a INb Z2(s) M2c M2b Vb1 M2a M2 M1c M1b Bias network M1 M1a “Fancy” differential amplifier (pg 23) GND (33) MDT-ASD topology Shaper differential amplifiers (34) Summary & conclusions Analysis/design methodology 1. Understand requirements • Noise, dynamic range,.. • Impedances • Signal shapes • etc 2. Hand calculations will get you close and/or guide design • Noise contributions of worst offenders • Transfer functions, response shapes, etc • Transistor sizing for CMOS circuits 3. SPICE modelling • Vendor SPICE models can be very accurate but very complicated • Produce best analysis at expense of intuitive understanding To learn more Attend IEEE Nuclear Science Symposia and take “Short course” programs in Front End Electronics (IEEE NSS 2003 Portland, Oregon, Oct 19-25) Bibliography & lending library 1) “Particle Detection with Drift Chambers” W.Blum, L. Rolandi Springer Verlag, pg 134, 155-158 2) “Tables of Laplace Transforms” Oberhettinger & Badii, Springer Verlag 3) “Complex Variables and Laplace Transform for Engineers” LePage, Dover 4) “Electronics for the Physicist” Delaney, Halsted Press 5) “Noise in Electronic Devices and Systems” Buckingham, Halsted Press 6) “Low-Noise Electronic Design” Motchenbacher & Fitchen, Wiley Interscience 7) “Processing the signals from solid state detectors” Gatti & Manfredi, Nuovo Cimento 8) “Analog MOS Integrated Circuits for Signal Processing” Gregorian & Temes, Wiley Interscience 9) “Detector Physics of the ATLAS Precision Muon Chambers” Viehhauser, PhD thesis, Technical University Vienna. 10) “MDT Performance in a High Rate Background Environment” Aleksa, Deile, Hessey, Riegler – ATLAS internal note, 1998 (35)