of pp-HMDSO Buffer Film

Report
Leading Technology for AMOLED
Backplane and Encapsulation
Eric Sun
Technical Marketing Director
CTO Office
AKT Display Group
Applied Materials, Inc.
Display Innovation China 2014/Beijing
Date: Oct. 15, 2014
External Use
Display Technology
Trend and Challenges
Display  Growing Visual Demand  The eyes have it!
GROWING DEMAND
IMMERSION
CONSUMPTION
NEW TECHNOLOGIES
EMOTION
3
INTERACTION
External Use
Display Technology Transitions
TRANSISTOR
DISPLAY
TODAY
SIZE
RES.
TV
55”
65”
>70”
Phone
5”
5.x”
<7”
TV
FHD
LCD
a-Si
OR
OLED
4K
8K
Phone >400ppi >600ppi >700ppi
LTPS
OR
Form
Factor
4
MOx
External Use
FLEX
OLED
AKT solutions_PVD
Meter² of
Chinese Capacity
AKT PiVot® : Rotary PVD System for Array Backplane
“. . . rotary targets are leveraging higher
productivity and film quality to win a
significant portion of new fab business.”
- DisplaySearch, July 2014
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External Use
Rotary Cathode Array
Enabling improved uniformity and defect control
Uniformity
Planar
Rotary
Open (Spacious)
Architecture
Cu
Mo
Al
ITO
IGZO
Programmable Magnet
Wobble
Obstructed
Uniform
Gas Flow
Defect Control
Planar
Rotary
Rotating Target
Full-surface erosion
“Self-Cleaning”
Minimum Nodules and ReDeposition with Rotary
7
Clean Target Erosion over Life
External Use
Enhancing PVD Processes for LTPS
 Optimize thickness & Rs unif. for better
design rules; Reduce defects for Yield
 Leverage rotary target & directional
magnet control to increase step coverage
 Ion bombardment & process tuning
to minimize intrinsic film stress
8
 Utilizing rotary target technology to
decouple directional grain growth
External Use
ITO Optimization with H2 + O2 Process
Adjust H2 to control amorphous
crystal ratio, etch rate & residues
Adjust O2 to control Rs & Rs
uniformity
Providing next generation capability for Advanced LTPS
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External Use
Optimizing IGZO Uniformity
 Two routes towards more uniform reflectivity profiles
Ion Bombardment Control
• Energetic oxygen ion
bombardment locally increasing
microwave reflectivity
• Magnet movement improving as
depo non-uniformities
• PiVot can eliminate target
imprints
IGZO Post Annealing
• As depo non uniformities in µPCR
can be reduced by annealing
µPCR 4.8% after annealing
4.7% THK uniformity
10
External Use
Addressing Uniform MOx Electronic Properties
IGZO TFT Structures
IGZO Layer (µPCD)
Unif. ≈ 40%
No Magnet
Wobble
4 TFTs for
each position
Unif. < 5%
Optimized
Wobble
No Vth difference between
or in front of targets
Rotary Target Technology Mitigates Mura Effects for IGZO Backplanes
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External Use
AKT solutions_PECVD &
TFE for OLED
Gen6 PECVD Solution for High Resolution Display
 Substrate size
 System architecture
 1500x1850 mm2
 Single Substrate Operation System at Cluster Tool
High Temperature
Process Chamber (Max.5)
: Max. 5 PC (High Temperature Process Chamber)
: Annealing Chamber (Option)
: DSSL (Dual Single Slot Load Lock)
: Transfer Chamber
: High Temperature Dual Arm Vacuum Robot
Annealing Chamber (Option)
Transfer Chamber
w/Dual Arm Vacuum Robot
Key Advantages
• Uniformity
• Particle Control
• High System Reliability
DSSL (Dual Single Slot Loadlock)
External Use
CVD Advantages : Uniformity and Low Defect
Diffuser with HCG
(Hollow Cathode Gradient)
Top-Down RPSC
(Remote Plasma Source Clean)
Plasma Uniformity
Control
Uniform and Efficient
Chamber Clean
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External Use
IEEE
Innovation
Award
Patent
Protected
Demonstrated
Uniformity up to Gen10
SiH4-SiO
Uniform gas distribution
Pressure Simulation
w/Gas
Deflector
2500
2500
2000
Uniformity ~11%
DR (A/min)
DR (A/min)
2000
1500
1000
Conventional design
500
Uniformity ~4%
1500
1000
500
0
0
0
500
1000
1500
0
Distance (mm)
500
1000
1500
Distance (mm)
Enhanced diffuser assembly design for uniform gas distribution improves
center dip profile on SiH4 based SiO process
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External Use
CVD Film Requirements for Reliable MO-TFT
Back channel protection,
H-less Interface
Passivation to protect from
attacking by OH and H2O
S
D
Back channel protection
during process
D
S
a-IGZO
a-IGZO
G
G
Substrate
Substrate
ESL Structure
BCE Structure
Low defect, H- less
Gate Insulator
Low defect H-less
Gate Insulator
H-less Interface
Low defect and H-less dielectric material is the requirement of gate
insulator, etch stop and passivation for IGZO TFT for high reliability
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External Use
“One Cluster Solution” _ TFE
 Complete All TFE process in one cluster
►
Vacuum Connection to EV tool
►
Flexible Sequence control by MCC software
►
High reliability Mainframe and Vacuum robot
►
Mask deposition with Auto Mask Exchange and Mask Stocker
Mask Stocker
Concept
CVD Chamber
2nd Layer
pp-HMDSO (SiCN)
Upper-stream
Load Lock
Example
3
5 Layer
Lower-stream
Load Lock
OLED
EV Tool
IN
OUT
1st Layer
SiN
Multiple Layer Stack
3rd Layer
CVD Chamber
SiN
TFE Technology for OLED mass production
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External Use
AKT OLED Solutions: Thin Film Encapsulation
Barrier: SiN
Buffer: SiCN
pp-HMDSO
18
•
Multilayer structures with SiN layer and SiCN/pp-HMDSO buffer layer
•
SiN/SiCN structure:
For TV or Rigid Display Applications
•
SiN/pp-HMDSO structure:
For Flexible Mobile Applications
•
Both TFE structures have passed customer device lifetime evaluation
External Use
TFE : PECVD SiN Barrier Films
SiN WVTR : 1x10-3 g/m2·day
range at 1µm single layer SiN
@ 85°C/85%RH
(by MOCON and Ca-test method)
WVTR at 85°C/85%RH is about 2 orders
higher than the ambient conditions
SiN properties (80°C process)
Film
RI
DR
A/min
Unif. %
%T
@400nm
Stress
MPa
TFE SiN
1.85
> 2500
< 10%
> 90%
< 100
• High optical transmittance (>90% at 400nm and above)
• Excellent Barrier performance
• High Depo. Rate
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External Use
TFE : PECVD pp-HMDSO Buffer Films
>95% Transmittance
3 Layer (SiN/HMDSO)
~0 Stress
Plasma polymerized HMDSO (pp-HMDSO)
N2O
Hexamethylsiloxane (HMDSO)
20
Film
RI
DR
A/min
Unif. %
%T
@400nm
Stress
MPa
pp-HMDSO
1.45
> 5000
< 10%
> 95%
~0
External Use
TFE : “Flowability” of pp-HMDSO Buffer Film
 The buffer film we developed has a wide range of physical properties,
from flowable liquid-like to rigid glass-like, depending on the process
conditions
 A flowable buffer film can cover a particle without leaving any voids or
diffusion channel around it.
8µm x 4µm
Without high Stress Hot Point
(Better Particle Coverage)
No Sharp Corners Observed
on the particle
• High optical transmittance (>95% at 400nm and above)
• High Depo Rate
• Excellent Particle coverage
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21
External Use
TFE Layer Development Achievement
Step Coverage Profile
• Non-conformal profile – planarization of surface
irregularity
• No high stress hot spots – minimize film cracking during
bending
Particle Coverage
• No voids around the particles – eliminate moisture
permeation path
• No high stress hot spots and good surface planarization
Stack Film Integration
• Stress matching by adding interfacial layer
• Transmittance improved to ~85%T @ 400nm
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External Use
Summary
• AKT PECVD, PVD & TFE technology and system performance have
been recognized by display customers and are ready for next
generation LTPS TFT, MOx TFT and AMOLED application.
• AKT PiVot PVD system with advanced rotary target design enable high
uniformity and low defect for metal & oxide film.
• AKT continues to innovate PECVD tool by developing differentiated,
valuable and sustainable solutions to support our customers’ needs;
focusing on film thickness uniformity, and ultra-low particle performance.
• AKT new developed TFE system with proven cluster architecture offers
superior barrier/buffer layers and excellent performance for flexible
AMOLED.
AKT Solutions ready for next generation display with LTPS TFT,
MOx TFT and AMOLED
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External Use

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