Masters Presentation 2012 Intel

Masters and Masters Qualifier
Electronic Systems
Telecommunications Engineering
School of Electronic Engineering
• Masters in Electronic Systems
– NEW Major in Semiconductor Manufacturing
– Major in Nanoelectronics & Photonics
– Major in Image Processing & Analysis
• Masters in Telecommunications
– Major in Network Implementation
Entry Requirements
• H2.2 minimum in electronic/ electrical
engineering, applied physics or computer
science for direct entry onto the Masters
• Basic primary degree for direct entry onto
the Qualifier Programme. (In exceptional
circumstances diploma + 3yrs experience +
Masters Qualifier Programme
• Choose your modules wisely and you only
need to take 8 modules in total for both the
Qualifier and the Masters.
• Pass 4 modules and you transfer onto the
Masters Programme (level 8 - 50%)
Flexible Masters
• You can opt out of the Masters Programme
and you will still get a cert (4 modules) or a
diploma (8 modules)
• To complete the Masters you must pass 8
modules plus project within 4 years.
• You can take more than 8 modules if you
wish and result calculated on best 8 results.
Programme Structure
8 Modules +
4 Modules
4 modules per
4 modules per
2 modules per
2 modules per
• Students who are studying part time can
study remotely using the DCU Moodle
system to access notes, video’s and other
course material
• Students who work a shift pattern and
would like to attend lectures are free to do
Choosing Your Modules
See the ‘Programme Planner’ for 2012/13 Semester 1/2
(next slides).
– Electronic Systems Students can choose ANY 8 modules.
– Telecoms students MUST take at least 6 modules from the
‘telecoms’ module set (marked with *) plus ANY other two
for module descriptions and criteria for Majors.
Programme Planner 2012/13
EE402: Object Oriented Programming *
EE449: DSP (Digital Filters & DFT) *
EE450: Communications Theory *
EE453: Image Processing & Analysis with Project
EE509: Data Network Protocol Analysis and Simulation *
EE535: Renewable Energy: Systems, Technology and Economics
EE540: HDL/High Level Logic Synthesis
EE541: Nano & Microelectronic Device Manufacturing
EE554: Image and Video Compression *
EE588: Semiconductor Manufacturing Equipment and Systems
EE562: Network Programming *
Programme Planner 2012/13
EE417: Web Application Development *
EE451: Mechatronic System Simulation & Control
EE452: Wireless and Mobile Communications *
EE454: Optical Communications System Design *
EE500: Performance of Data Networks *
EE502: DSP (Signal Modelling & Compression) *
EE558: Advanced RF Circuit Modelling
EE506: Fundamentals of Photonic Devices
EE507: Entrepreneurship for Engineers
EE587: Plasma Process Technology
EE538: Secure Sys Admin & Internetwork Security *
EE544: Computer Vision
EE550: Characterisation Technology for Nanomaterials
EE552: Broadband Networks *
EE563: Graphics & Visualisation
Programme Planner
Masters Project
Every student should complete ONE of the following Masters project modules
Project Module Codes for each M.Eng flavour:
EE592: Electronic Systems Project (MEN)
EE593: Telecommunications Eng. Project (MTC)
EE594: Nano Major Project (MEN)
EE595: Imaging Major Project (MEN)
EE596: Network Major Project (MTC)
EE598: Semiconductor Manufacturing Project (MEN)
Literature Review
Interim Presentation
Project Implementation
Final Report
– Research paper
– Appendices
• Final Oral Examination
Major in Semiconductor
• Newly introduced in the academic year
2012-2013 is a Major in Semiconductor
Manufacturing, a specialisation on the
Masters in Electronic Systems addressing
modern semiconductor manufacturing
practices, methodologies and technologies.
Core Courses
• Nano & Microelectronic Device
• Characterisation Technology for
• Plasma process Technology
• Semiconductor Manufacturing Equipment
and Systems
• Applied Project
Semiconductor Manufacturing
Equipment and Systems
This course aims to provide the students with an understanding of the of the design and
control of the primary families of equipment used in modern semiconductor
manufacturing plants, including chemical mechanical polishing, optical lithography,
implantation, thermal annealing and diffusion, metal and dielectric etch, and packaging
The student will learn how to design and implement statistical and advanced process
control schemes and how to specify the appropriate metrology.
We will also explore fundamental facilities issues including vacuum technology, gas
handling, and water and waste management.
Finally, the student will learn to analyse and optimize process flow through the factory
and the needs of the specific tool sets.
Semiconductor Manufacturing
Equipment and Systems
1. Design semiconductor manufacturing process flows. (PO3)·
2. Analyse the performance of a tool-set and relate to productivity and yield
3. Calculate and solve for optimal manufacturing throughput.. (PO1,PO2)·
4. Outline deficiencies in the major processing systems. (PO1)·
5. Explain the basic physics of vacuum technology and associated technology.
6. Specify the best practice in hazardous materials handling, as relevant to
semiconductor manufacturing. (PO4)·
7. Develop strategies for waste and water management, as relevant to
semiconductor manufacturing. (PO4)·
Plasma Process Technology
This course aims to provide the student with a fundamental understanding of plasma
process technology as applied to semiconductor manufacturing.
The students will develop an understanding based on an examination of the basic plasma
physics of low temperature plasmas.
Using this fundamental knowledge, combined with a study of the typical chemistries
used in semiconductor etch and deposition processes, the students will be able to design
a process and identify the optimal hardware configuration for a given technological
The interaction of plasma produced species with a surface will be examined and the
student will learn to quantify and estimate surface effects including sputter and etch
rates, anisotrophy, selectivity, and deposition rates.
Methods for controlling, analyzing, and characterizing process plasmas will be
examined in order for students to be able to apply their learning to real-world
manufacturing problems.
Plasma Process Technology
1. Interpret and solve for basic plasma physical parameters and properties. (PO1,PO2)·
2. Describe electron heating mechanisms in low pressure plasmas. (PO1)·
3. Use global models to solve for basic plasma chemical and electrical properties.
4. Design plasma processes for deposition and etch. (PO3)·
5. Identify optimal hardware configurations based on the technological requirements.
7. Describe the motion of particles in the plasma bulk and sheath regions. (PO1)·
8. Understand surface effects including etch, deposition, physical sputtering and
functionalising. (PO1)·
9. Calculate the number densities of the major plasma species. (PO1)·
10. Design plasma control and characterization processes. (PO3)
How to Apply?
• Apply through
• There are two intakes – Sept and Feb
• Deadline for application is Mid Sept
(approx) for Sept intake and for February
intake it’s mid January (approx)
• Non EU applicants must apply early
• Check on line for exact dates
Fees 2012/2013
Payment of Fees
Any Questions?
Thank you for your time

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