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Monolithic pixel sensors
Ivan Perić
Seminar at University of Geneva, November 6th, 2013
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Introduction – classification of CMOS sensors
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Pixel type
Simple pixels (no particle detection in pixel, analog output, rolling shutter readout)
Intelligent pixels (particle detection in pixel, digital output, zero-suppressed readout)
Technology
Standard (CMOS, Opto- or HV-CMOS) or special technology (Hi-resistive CMOS, backside
depleted, SOI)
Bias voltage
Low (charge collection: diffusion based, sensor: epi layer)
High (charge collection: drift based, sensor: depleted layer)
Seminar at University of Geneva, November 6th, 2013
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Introduction – classification of CMOS sensors
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Simple pixels
CMOS pixel sensors
Standard MAPS
Intelligent pixels
INMPAS
TWELL MAPS
Depleted MAPS with intelligent pixels
HVCMOS (Hi-Res CMOS included)
Espros MAPS
T3 MAPS
SOI
LV MAPS
(Epi Layer)
HV MAPS
(Delpeted Layer)
Standard (HV-) or OptoCMOS
Standard MAPS (“MIMOSAtype”)
TWELL MAPS
HVCMOS,
T3
Special technology
INMAPS
SOI,
Espros
Seminar at University of Geneva, November 6th, 2013
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Commercial CMOS monolithic pixel sensors
Seminar at University of Geneva, November 6th, 2013
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CMOS monolithic sensors
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The original application of CMOS sensors – consumer electronics
Imaging sensors for digital cameras and mobile phones
Improvements are necessary for HEP
Seminar at University of Geneva, November 6th, 2013
Phone with 41 M pixel sensor, 1.4um pixel size
Commercial imaging sensors
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Imaging sensors for digital cameras and mobile phones
29 mm
Canon 120 M pixels CMOS, 2 µm pixel size
Seminar at University of Geneva, November 6th, 2013
MOS technology
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MOS Technology – Integrated circuit technology based on Metal Oxide Semiconductor field effect
transistors
„Metal“ Electrode
Insulator
n type region “diffusion”
Silicon p type
Samsung 32nm process
Seminar at University of Geneva, November 6th, 2013
PN junction
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The simplest building element – PN junction
N-diffusion – potential minimum for electrons
P-substrate –potential barrier for electrons
Silicon n type
Silicon p type
Free electrons
Seminar at University of Geneva, November 6th, 2013
PN junction
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Reversely biased – large depleted layer
Detector mode
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Silicon n type
Silicon p type
Depleted
Seminar at University of Geneva, November 6th, 2013
PN junction as sensor of radiation
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PN junction as sensor
1. step - ionization
Photons or particles
Ionisation
Free eAtoms
Seminar at University of Geneva, November 6th, 2013
PN junction as sensor of radiation
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PN junction as sensor
2. step – charge collection
Two possibilities for charge collection – drift (through E-force) and by diffusion (density gradient)
Collection of electrons
Atoms
Seminar at University of Geneva, November 6th, 2013
PN junction as sensor of radiation
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PN junction as sensor
3. step – charge to voltage conversion
Collection of the charge signal leads to the potential change
Potential change
Atoms
Seminar at University of Geneva, November 6th, 2013
CMOS pixel
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Pixel sensor in MOS technology
Sensor-junction
N-type region
Diffusion (shallow)
Or well (deep)
MOS FET
Gate
MOS FET
Sensor-junction
Seminar at University of Geneva, November 6th, 2013
CMOS pixel
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N in P diode acts as sensor element – signal collection electrode
Sensor-junction
N-type region
Diffusion (shallow)
Or well (deep)
MOS FET
Gate
MOS FET
Sensor-junction
Seminar at University of Geneva, November 6th, 2013
CMOS pixel
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Charge generated by ionization is collected by the N-diffusion
This leads to the potential change of the N-diffusion
The potential change is transferred to transistor gate – it modulates the transistor current
Sensor-junction
N-type region
Diffusion (shallow)
Or well (deep)
MOS FET
Gate
MOS FET
Sensor-junction
Seminar at University of Geneva, November 6th, 2013
Rolling shutter readout
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Readout principle: Many pixels (usually one row) share one readout line
Additional MOSFET used as switch
The readout lines are connected to the electronics at the chip periphery that does signal
processing
Switch
Switch
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Periphery of the chip
Pixel i
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Pixel i+1
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Seminar at University of Geneva, November 6th, 2013
CMOS monolithic pixel sensors for particle tracking
Seminar at University of Geneva, November 6th, 2013
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CMOS sensors for particle tracking
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Can CMOS structure be used for detection of high energy particles in particle tracking?
Yes, but fill factor is an issue – ratio of the sensitive versus insensitive area
Detected
Not detected
Absorbed by electronics
Charge collection by drift
Seminar at University of Geneva, November 6th, 2013
Fill-factor
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Partial signal collection in the regions without E-field
Seminar at University of Geneva, November 6th, 2013
Fill-factor
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Partial signal collection in the regions without E-field
Recombination
Seminar at University of Geneva, November 6th, 2013
Overview
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Partial signal collection in the regions without E-field
Recombination
Seminar at University of Geneva, November 6th, 2013
Overview
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Partial signal collection in the regions without E-field
Charge collection by diffusion
Seminar at University of Geneva, November 6th, 2013
Fill-factor
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Partial signal collection in the regions without E-field
Charge collection by diffusion
Seminar at University of Geneva, November 6th, 2013
Fill-factor
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In the case visible light imaging, the insensitive regions do not impose a serious problem
Light can be focused by lenses
Exposure time can be increased
In the case of particle tracking, any insensitive region should be avoided
Seminar at University of Geneva, November 6th, 2013
CMOS pixel sensor with 100% fill factor
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MOS sensor with 100% fill-factor
Based on epi-layer
Monolithic active pixel sensor - “MAPS”
MOS FET
NMOS
N-diffusion or N-well
Heavily p-doped P-well
Lightly p-doped epi-layer
Seminar at University of Geneva, November 6th, 2013
CMOS pixel sensor with 100% fill factor
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Ionization in the epi-layer
Charge collection by diffusion
Particle
N-diffusion or N-well
Seminar at University of Geneva, November 6th, 2013
MAPS
Seminar at University of Geneva, November 6th, 2013
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CMOS pixel sensor with 100% fill factor - MAPS
NMOS transistor in p-well
N-well (collecting region)
Pixel i
P-type epi-layer
P-type substrate
Energy (e-)
Charge collection (diffusion)
MAPS
Seminar at University of Geneva, November 6th, 2013
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MAPS
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Many institutes are developing MAPS, for instance: IPHC Strasbourg (PICSEL group)
Family of MIMOSA chips
Applications:, STAR-detector (RHIC Brookhaven), Eudet beam-telescope and ALICE inner tracker
upgrade
http://www.iphc.cnrs.fr/Monolithic-Active-Pixel-Sensors.html
Seminar at University of Geneva, November 6th, 2013
MAPS
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MIMOSAs are based on rolling shutter RO but use more complex pixel electronics
Continuous reset and double correlated sampling
Ultimate chip for STAR
MIMOSA 26 for Eudet telescope
http://www.iphc.cnrs.fr/Monolithic-Active-Pixel-Sensors.html
Seminar at University of Geneva, November 6th, 2013
MAPS
Charge collection & technology studies – simple demonstrators
1999
Real size prototype - yield studies
Reticule 2x 2 cm 2006
Mimosa16
Mimosa16
Latchup
ADC
ADC
MyMap
TestStruct
Imager10µ
MimoTEL
Imager12µ
MimoStar3
Pixel Array
Production
Discriminators
Zero Suppression
Bias Readout
Final circuits
Mimosa22
2008
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Seminar at University of Geneva, November
2007
sub-blocs integration
6th,
2013
Suze 2007
Data compression
Sara 2006
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digitization
Advanced CMOS pixel sensors with intelligent pixels
Seminar at University of Geneva, November 6th, 2013
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Frame readout
- Simple pixels
- Signal and leakage current is collected
- No time information is attached to hits
- The whole frames are readout
 Small pixels
 Low power consumption
 Slow readout
Seminar at University of Geneva, November 6th, 2013
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Sparse readout
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- Intelligent pixels
- FPN is tuned inside pixels
- Leakage current is compensated
- Hit detection on pixel level
- Time information is attached to hits
 Larger pixels
 Larger power consumption
 Fast (trigger based) readout
Seminar at University of Geneva, November 6th, 2013
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Intelligent pixel
CR-RC
Comparator Latch
Bus driver
CSA
RAM
Readout bus
4-bit tune DAC
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Sparse readout
Sparse readout
Sensor
Comp. out
Rolling shutter readout
Sensor
Reset
RO enable
Comp. out
Seminar at University of Geneva, November 6th, 2013
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CMOS electronics
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Two transistor types n-channel NMOS and p-channel PMOS are needed for the realization of
complex circuits
„Metal“ Electrode
„Metal“ Electrode
Insulator
Silicon n type
Insulator
Silicon p type
NMOS
Silicon p type
PMOS
Silicon n type
Holes
PMOS
Holes
NMOS
Free e-
Seminar at University of Geneva, November 6th, 2013
CMOS electronics
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Example: A good voltage amplifier can only be realized with CMOS
„Metal“ Electrode
„Metal“ Electrode
Insulator
Silicon n type
Insulator
Silicon p type
NMOS
Silicon p type
PMOS
Silicon n type
PMOS
Holes
NMOS
Free e-
Seminar at University of Geneva, November 6th, 2013
MAPS structure with CMOS pixel electronics
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If PMOS transistors are introduced, signal loss can happen
N-well (collecting region)
Pixel i
NMOS transistor in p-well
PMOS transistor in n-well
P-type epi-layer
P-type substrate
Signal loss
Signal collection
Seminar at University of Geneva, November 6th, 2013
Energy (e-)
MAPS with a PMOS transistor in pixel
Advanced structures: INMAPS
Seminar at University of Geneva, November 6th, 2013
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INMPAS
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Deep P-layer is introduced to shield the PMOS transistors from epi layer
No charge loss occurs
This is not a CMOS standard process
Only one producer so far: Tower Jazz
Pixel
PMOS in a shallow p-well
NMOS shielded by a deep p-well
N-well (collecting region)
P-doped epi layer
INMAPS
Seminar at University of Geneva, November 6th, 2013
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Overview
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INMAPS Tower Jazz process is gaining popularity in particle physics community
/ALICE inner tracker)
It was originally developed by the foundry and the Detector Systems Centre, Rutherford Appleton
Laboratory
2 Megapixels, large area sensor
Designed for high-dynamic range X-ray imaging
40 µm pixel pitch
1350 x 1350 active pixels in focal plane
Analogue readout
Region-of-Reset setting
140 dB dynamic range
20 frames per second
http://dsc.stfc.ac.uk/Capabilities/CMOS+Sensors+Design/Follow
+us/19816.aspx
Seminar at University of Geneva, November 6th, 2013
FORTIS chip
Overview
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Detector Systems Centre, Rutherford Appleton Laboratory – some examples
Wafer scale 120 x 145 mm chip for medical imaging
http://dsc.stfc.ac.uk/Capabilities/CMOS+Sensors+Design/Follow
+us/19816.aspx
Seminar at University of Geneva, November 6th, 2013
TWELL - MAPS
Seminar at University of Geneva, November 6th, 2013
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TWELL MAPS
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Collection electrode is a deep n-well
To avoid crosstalk, secondary n-well is used for digital electronics
Rely on diffusion, implemented in low voltage CMOS processes
Collaboration: INFN Pisa, Pavia, Trieste, Padova, Torino, Bologna
P-well
Deep n-well
Signal collection
Epi-layer
Pixel
2. n-well
NMOS
PMOS
Signal loss
Diffusion
Triple-well MAPS
Seminar at University of Geneva, November 6th, 2013
Energy (e-)
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TWELL MAPS
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APSEL Chips for B-factories
The APSEL4D MAPS chip bonded to the chip carrier.
Schematic drawing of the full Layer0 made of 8 pixel modules
mounted around the beam pipe with a pinwheel arrangement.
“Thin pixel development for the SuperB silicon vertex tracker”, NIMA vol. 650, 2011
Seminar at University of Geneva, November 6th, 2013
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Fast CMOS detectors based on drift charge collection:
detectors in HVCMOS-processes and the CMOS
processes with a high resistive wafer
Seminar at University of Geneva, November 6th, 2013
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Drift based detector: HVMAPS
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HVMAPS rely on the charge collection by drift
Fast charge collection – high radiation tolerance
The key is the use of a high voltage n-well in a relatively highly doped substrate
Pixel electronics is embedded in the n-well
Two concepts:
High Ohmic Monolithic Pixels - LePIX – relies on a special CMOS process with high resistive
substrate (CERN, Geneve)
HVCMOS (or smart diode arrays - SDAs) – use a commercial HVCMOS process
Seminar at University of Geneva, November 6th, 2013
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HVCMOS detectors (smart diode arrays)
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SDA
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Smart diode array
Pixel
“Smart” Diode
n-Well
Drift
Energy (e-)
Depleted
P-Substrate
“Smart diode” Detector
Seminar at University of Geneva, November 6th, 2013
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SDA
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Collected charge causes a voltage change in the n-well.
This signal is sensed by the amplifier – placed in the n-well.
P-substrate
PMOS
NMOS
G
S
D
holes
electrons
N-well
Seminar at University of Geneva, November 6th, 2013
P-well
SDA
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Collected charge causes a voltage change in the n-well.
This signal is sensed by the amplifier – placed in the n-well.
P-substrate
Seminar at University of Geneva, November 6th, 2013
SDA
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Collected charge causes a voltage change in the n-well.
This signal is sensed by the amplifier – placed in the n-well.
P-substrate
Seminar at University of Geneva, November 6th, 2013
Intelligent pixel
3.3 V
CR-RC
Comparator
CSA
AC coupling
-50 V
N-well
P-substrate
Seminar at University of Geneva, November 6th, 2013
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Intelligent pixel
3.3 V
CR-RC
Comparator
CSA
AC coupling
-50 V
N-well
P-substrate
Seminar at University of Geneva, November 6th, 2013
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Intelligent pixel
3.3 V
CR-RC
Comparator
CSA
AC coupling
-50 V
N-well
P-substrate
Seminar at University of Geneva, November 6th, 2013
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Intelligent pixel
3.3 V
CR-RC
Comparator
CSA
AC coupling
-50 V
N-well
P-substrate
Seminar at University of Geneva, November 6th, 2013
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Intelligent pixel
3.3 V
CR-RC
Comparator
CSA
AC coupling
-50 V
N-well
P-substrate
Seminar at University of Geneva, November 6th, 2013
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Intelligent pixel
3.3 V
CR-RC
Comparator
CSA
AC coupling
-50 V
N-well
P-substrate
Seminar at University of Geneva, November 6th, 2013
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Intelligent pixel
3.3 V
CR-RC
Comparator
CSA
AC coupling
-50 V
N-well
P-substrate
Seminar at University of Geneva, November 6th, 2013
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3D layout of a “smart diode”
40 µm
3D layout generated by GDS2POV software
Seminar at University of Geneva, November 6th, 2013
Applications
4.4mm
Mu3e experiment at PSI and ATLAS
upgrade option
5 mm
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Mu3e prototype chip
ATLAS prototype chip
Seminar at University of Geneva, November 6th, 2013
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Special monolithic technologies
Seminar at University of Geneva, November 6th, 2013
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Espros
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Espros – semiconductor company in
Switzerland
Depleted
N-well
P-well
Ohmic connection
N-type
P-diffusion
Seminar at University of Geneva, November 6th, 2013
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Espros
HV
N-well
P-well
No ohmic connection
N-type depleted
P-diffusion
Seminar at University of Geneva, November 6th, 2013
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Espros
HV
N-well
P-well
N-type depleted
P-diffusion
Seminar at University of Geneva, November 6th, 2013
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T3-MAPS
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T3-MAPS rely on a special option in IBM 130nm technology
P-well
T3-well
P-substrate
Seminar at University of Geneva, November 6th, 2013
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Thank you!
Seminar at University of Geneva, November 6th, 2013
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