design and implementation of transformerless

Report
DESIGN AND IMPLEMENTATION OF
TRANSFORMERLESS INVERTER
WITH DC CURRENT ELIMINATION
Guided By Dr. Sasidharan Sreedharan
Presented By,
SUDHIN P.K
1
PGEE02012
CONTENTS
OBJECTIVE
 MOTIVATION
 LITERATURE REVIEW
 PROPOSED CONVERTER
 COMPLETE MODEL – BLOCK DIAGRAM
 EXPECTED OUTCOME
 GANTT CHART
 REFERENCES

2
OBJECTIVE

Phase I :
i.
ii.

Simulation : Transformerless Inverter Model
Hardware implementation of Transformerless
inverter (Off Grid Model)
Phase II :
i.
ii.
PLL Design
Grid Integration of Developed Model
3
MOTIVATION
Increasing demand of PV system
 Development of Cost Effective system
 Complete elimination of CM leakage current

4
WHY ‘LESS’ TOPOLOGY?
Most Commercial PV inverters employ either linefrequency or high-frequency isolation transformers.
 Increases – Size,Cost,Losses
 Transformerless Topology – Reduced Size, weight,
cost and installation complexity
 Increases efficiency by 2%
 produces Common Mode Leakage Current

5
THE COMMON MODE LEAKAGE CURRENT,

increases the system losses

reduces the grid connected current quality

induces severe conducted and radiated
electromagnetic interference

causes personal safety problems.
6
7
Literature Review
Full H Bridge Topology [5]
I.
Simple Structure
II. High EMI
III. High Common mode
Leakage Current
Half H Bridge Topology [5]
I.
Simple Structure
II. High EMI
III. High Common mode
Leakage Current
IV. High Voltage Stress across
switches
8
HERIC Topology [6]
H5 Topology [7]
I.
I.
Large number of Switches
Less number of Switches
II. Low EMI
II. Low EMI
III. Low Common mode
Leakage Current
III. Low Common mode
Leakage Current
9
PROPOSED TOPOLOGY : CONCEPT
10
PROPOSED TOPOLOGY
11
COMPARISON WITH PATENTED TOPOLOGIES
HERIC
(Sunways)
H5 Topology
(SMA)
Proposed
Topology
Input
Capacitors
1
1
1 (but one
additional
switched
capacitor)
Input
Capacitance
low
low
low
Switches
6
5
5
Diodes
2
0
0
No of output
voltage
Levels
3
3
3
Leakage
Current
Very Low
Very Low
Nil
12
COMPLETE MODEL
12/24 V
(DC)
DC-DC
CONVERTER
(MPPT)
Triggering
Pulses
MICRO
CONTROLLER
Vpv,Ipv
400 V
(DC)
TRANSFORMERLESS INVERTER
220 V
(AC)
LOAD/
GRID
Triggering
Pulses
(SPWM)
MICRO
CONTROLLER
13
EXPECTED OUTCOME
Simulation and Hardware implementation of
Transformerless Inverter with complete DC current
elimination.
 Less voltage and current stress on switches in
comparison with HERIC and H5 Topology

14
GANTT CHART
15
REFERENCES
[1] Gu, Yunjie, Wuhua Li, Yi Zhao, Bo Yang, Chushan Li, and Xiangning He.
"Transformerless Inverter with Virtual DC Bus Concept for Cost Effective Gridconnected PV Power Systems." (2013): 1-1.
[2] S. B. Kjaer, J. K. Pedersen, and F. Blaabjerg, “A review of single-phase gridconnected inverters for photovoltaic modules,” IEEE Trans. Ind.Appl., vol. 41, no. 5,
pp. 1292–1306, Sep./Oct. 2005.
[3] T. Kerekes, R. Teodorescu, P. Rodr´ıguez, G. V´azquez, and E. Aldabas, “A new
high-efficiency single-phase transformerless PV inverter topology,”IEEE Trans. Ind.
16
Electron., vol. 58, no. 1, pp. 184–191, Jan. 2011.
REFERENCES
[4] Yang, Bo, Wuhua Li, Yunjie Gu, Wenfeng Cui, and Xiangning He. "Improved
transformerless inverter with common-mode leakage current elimination for a
photovoltaic grid-connected power system." Power Electronics, IEEE Transactions
on 27, no. 2 (2012): 752-762.
[5] Patrao, Iván, Emilio Figueres, Fran González-Espín, and Gabriel Garcerá.
"Transformerless
topologies
for
grid-connected
single-phase
photovoltaic
inverters." Renewable and Sustainable Energy Reviews 15, no. 7 (2011): 3423-3431.
[6] S. Heribert, S. Christoph, and K. Juergen, German Patent HERIC
Topology,DE 10221592 A1, Apr. 2003.
[7] V. Matthias, G. Frank, B. Sven, and H. Uwe, German Patent H5Topology,DE 102004030912 B3, Jan. 2006.
17

similar documents