atlas-az-mmfe-122013

Report
Schedule and Issues for the
Mini-1 and MMFE-8
Kenneth Johns
University of Arizona
Mini-1 Schedule
Task
Design
Design review and order
parts
Layout
PCB fabrication
Duration
90 days (from 12/1/13)
3/1/14
PCB assembly – 20 pcs
testing
20 days (done 4/30/14)
30 days (done 3/31/14)
10 days
Mini-1 is intended for bench tests of the VMM2
2
MMFE-8 Schedule
Task
Design
Design review and order
parts
Layout
PCB initial fabrication +
PCB initial assembly
PCB initial testing
PCB fabrication +
PCB assembly
PCB testing
PCB for distribution
Duration
105 days (from 12/1/14)
3/1/14
45 days (done 4/30/14)
30 days
15 days (done 6/14/14)
35 days (done 7/19/14)
8/15/14?
3
MMFE Demonstrator Costs
Production
Small Quantity
Parts
$568000
$1101046
Fabrication
$165000
$415800
Assembly
$343000
$864360
NRE
$1300
$3276
Total
$1077300
$2384482
1 MMFE board
$229
$506
1 board incl FPGA
$821
• Costs are in USD and include indirect costs
of 26%
• Costs do NOT include VMM IC costs or SCA
IC costs
4
Other Boards Needed
• S6-FMC board
– Design complete but needs layout and production
• 68p Mini-SAS (from Mini-1) to 80p Molex (for
BNL) adapter board
– Design not started, but have an earlier 80p Molex
adapter design (to 60p TE connector) to work
from
• Test fixture (pulser board) for MMFE-8 (not
thought about, not started, not scheduled)
5
Outstanding Issues
• Mini-1
– Can proceed in early January as Dan is available
– Needs VMM2 packaging and pinout
• MMFE-8
–
–
–
–
–
In early stages of design
Needs VMM2 packaging and pinout
Multidrop capability not settled
Power scheme(s) must be discussed and specified
Power for and configuration of FPGA must be
specified (from Lorne)
6
Outstanding Issues
• MMFE-8
– Clock distribution must be specified
– GbE connector must be specified
– Input protection choice must be made
– SRS I/O must be specified
– Cooling is not addressed
– RF cage requirement is not settled
– Integration with MM chamber not specified or
even thought about
7
Outstanding Issues
• Software and firmware
– A local DAQ scheme must be baselined (IPBUS,
MicroBlaze, something else, …)
– Host PC configuration and control software (Python,
Qt, …)
– Large list of firmware tasks
•
•
•
•
•
Multi-chip configuration
UDP GbE output needs to be implemented
Algorithm and output for L1DDC
Run modes – bench, test beam, ATLAS
…
8
Conclusions
• I have confidence we can produce the Mini-1
on a timescale compatible with VMM2
• The MMFE-8 demonstrator card will likely not
be available until August, 2014
• A significant software and firmware effort
must also accompany this card
9

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